From ba00a604fe91e08ce2e716bb51d173bd5cac2644 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 9 Sep 2022 01:35:50 +0100 Subject: [PATCH] add links, clarify --- openpower/sv/rfc/Makefile | 1 + openpower/sv/rfc/ls001.mdwn | 13 +++++++++---- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/openpower/sv/rfc/Makefile b/openpower/sv/rfc/Makefile index b505dd68c..3efa56b01 100644 --- a/openpower/sv/rfc/Makefile +++ b/openpower/sv/rfc/Makefile @@ -4,6 +4,7 @@ ls001.pdf: ls001.mdwn pandoc -V geometry:margin=0.25in \ -V fontsize=9pt \ -V papersize=a4 \ + -V linkcolor=blue \ -f markdown ls001.mdwn \ -s --normalize --smart --self-contained \ -o ls001.pdf diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 74c6fb1dd..5def9f75a 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -125,7 +125,7 @@ such large numbers of registers, even for Multi-Issue microarchitectures. Scalar 32-bit instructions and *may* be 64-bit-extended in future (safely within the SVP64 space: no need for an EXT001 encoding). -**Summary of Opcode space** +**Summary of Simple-V Opcode space** * 75% of one Major Opcode (equivalent to the rest of EXT017) * Five 6-bit XO 32-bit operations. @@ -258,12 +258,16 @@ all of which are 64/64 (or 64/32). **EXT059 and EXT063** Additionally for High-Performance Compute and Competitive 3D GPU, IEEE754 FP -Transcendentals are required, as are some DCT/FFT "Twin-Butterfly" operations: +Transcendentals are required, as are some DCT/FFT "Twin-Butterfly" operations. +For each of EXT059 and EXT063: * QTY 33of X-Form "1-argument" (fsin, fsins, fcos, fcoss) * QTY 15of X-Form "2-argument" (pow, atan2, fhypot) * QTY 5of A-Form "3-in 2-out" FP Butterfly operations for DCT/FFT * QTY 8of X-Form "2-in 2-out" FP Butterfly operations (again for DCT/FFT) +* An additional 8 instructions for IEEE754-2019 (fminss/fmaxss, fminmag/fmaxmag) + [under evaluation](https://bugs.libre-soc.org/show_bug.cgi?id=923) + as of 08Sep2022 \newpage{} @@ -272,8 +276,9 @@ Transcendentals are required, as are some DCT/FFT "Twin-Butterfly" operations: DCT has dozens of uses in Audio-Visual processing and CODECs. A full 8-wide in-place triple-loop Inverse DCT may be achieved in 7 instructions. Expanding this to 16-wide is a matter of setting -`svshape 16`. Lee Composition may be deployed to construct non-power-two -DCTs. The cosine table may be computed (once) with 18 Vector instructions. +`svshape 16` **and the same instructions used**. +Lee Composition may be deployed to construct non-power-two DCTs. +The cosine table may be computed (once) with 18 Vector instructions. ``` 1014 def test_sv_remap_fpmadds_ldbrev_idct_8_mode_4(self): -- 2.30.2