From ba2f31d43dafe2a8200cf7a73689da4738878ba6 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 9 Mar 2020 19:36:39 +0100 Subject: [PATCH] integration/soc: set use_rom when cpu_reset_address is defined in a rom region. --- litex/boards/targets/icebreaker.py | 2 +- litex/soc/integration/soc.py | 19 +++++++++---------- 2 files changed, 10 insertions(+), 11 deletions(-) diff --git a/litex/boards/targets/icebreaker.py b/litex/boards/targets/icebreaker.py index c8644d80..b8045b0c 100755 --- a/litex/boards/targets/icebreaker.py +++ b/litex/boards/targets/icebreaker.py @@ -68,7 +68,7 @@ class BaseSoC(SoCCore): kwargs["integrated_sram_size"] = 0 kwargs["integrated_rom_size"] = 0 - # Set CPU variant / reset address + # Set CPU variant / reset address kwargs["cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset # CRG -------------------------------------------------------------------------------------- diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index 37fed544..30f91f91 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -774,7 +774,6 @@ class SoC(Module): self.csr.update_alignment(self.cpu.data_width) # Add Bus Masters/CSR/IRQs if not isinstance(self.cpu, cpu.CPUNone): - self.cpu.use_rom = (reset_address is None) if reset_address is None: reset_address = self.mem_map["rom"] self.cpu.set_reset_address(reset_address) @@ -854,20 +853,20 @@ class SoC(Module): # SoC CPU Check ---------------------------------------------------------------------------- if not isinstance(self.cpu, cpu.CPUNone): - for name in ["sram"] + ["rom"] if self.cpu.use_rom else []: - if name not in self.bus.regions.keys(): - self.logger.error("CPU needs {} Region to be {} as Bus or Linker Region.".format( - colorer(name), - colorer("defined", color="red"))) - self.logger.error(self.bus) - raise - + if "sram" not in self.bus.regions.keys(): + self.logger.error("CPU needs {} Region to be {} as Bus or Linker Region.".format( + colorer("sram"), + colorer("defined", color="red"))) + self.logger.error(self.bus) + raise cpu_reset_address_valid = False - for container in self.bus.regions.values(): + for name, container in self.bus.regions.items(): if self.bus.check_region_is_in( region = SoCRegion(origin=self.cpu.reset_address, size=self.bus.data_width//8), container = container): cpu_reset_address_valid = True + if name == "rom": + self.cpu.use_rom = True if not cpu_reset_address_valid: self.logger.error("CPU needs {} to be in a {} Region.".format( colorer("reset address 0x{:08x}".format(self.cpu.reset_address)), -- 2.30.2