From ba650ccf91a103d90d45b5927a8a9220e222cfc5 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 22 Sep 2013 15:18:11 +0200 Subject: [PATCH] r600g: move some debug options to drivers/radeon --- src/gallium/drivers/r600/evergreen_compute.h | 2 +- src/gallium/drivers/r600/r600_asm.c | 6 ++-- src/gallium/drivers/r600/r600_buffer.c | 4 +-- src/gallium/drivers/r600/r600_pipe.c | 33 ++++++------------- src/gallium/drivers/r600/r600_pipe.h | 13 +------- src/gallium/drivers/r600/r600_shader.c | 14 ++++---- src/gallium/drivers/r600/r600_texture.c | 6 ++-- src/gallium/drivers/r600/sb/sb_core.cpp | 2 +- src/gallium/drivers/radeon/r600_pipe_common.c | 18 ++++++++++ src/gallium/drivers/radeon/r600_pipe_common.h | 15 +++++++++ 10 files changed, 61 insertions(+), 52 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_compute.h b/src/gallium/drivers/r600/evergreen_compute.h index f593432ec7d..e6c6d8f100d 100644 --- a/src/gallium/drivers/r600/evergreen_compute.h +++ b/src/gallium/drivers/r600/evergreen_compute.h @@ -55,7 +55,7 @@ void r600_compute_global_transfer_inline_write( struct pipe_context *, struct pi static inline void COMPUTE_DBG(struct r600_screen *rscreen, const char *fmt, ...) { - if (!(rscreen->debug_flags & DBG_COMPUTE)) { + if (!(rscreen->b.debug_flags & DBG_COMPUTE)) { return; } diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index 235188bd35f..581fd0e5e87 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -2281,8 +2281,8 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, uint32_t *bytecode; int i, j, r, fs_size; struct r600_fetch_shader *shader; - unsigned no_sb = rctx->screen->debug_flags & DBG_NO_SB; - unsigned sb_disasm = !no_sb || (rctx->screen->debug_flags & DBG_SB_DISASM); + unsigned no_sb = rctx->screen->b.debug_flags & DBG_NO_SB; + unsigned sb_disasm = !no_sb || (rctx->screen->b.debug_flags & DBG_SB_DISASM); assert(count < 32); @@ -2380,7 +2380,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, return NULL; } - if (rctx->screen->debug_flags & DBG_FS) { + if (rctx->screen->b.debug_flags & DBG_FS) { fprintf(stderr, "--------------------------------------------------------------\n"); fprintf(stderr, "Vertex elements state:\n"); for (i = 0; i < count; i++) { diff --git a/src/gallium/drivers/r600/r600_buffer.c b/src/gallium/drivers/r600/r600_buffer.c index 88281b07106..7fdd2ad9a55 100644 --- a/src/gallium/drivers/r600/r600_buffer.c +++ b/src/gallium/drivers/r600/r600_buffer.c @@ -150,7 +150,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx, } else if ((usage & PIPE_TRANSFER_DISCARD_RANGE) && !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) && - !(rctx->screen->debug_flags & DBG_NO_DISCARD_RANGE) && + !(rctx->screen->b.debug_flags & DBG_NO_DISCARD_RANGE) && (rctx->screen->has_cp_dma || (rctx->screen->has_streamout && /* The buffer range must be aligned to 4 with streamout. */ @@ -280,7 +280,7 @@ bool r600_init_resource(struct r600_screen *rscreen, res->domains = domains; util_range_set_empty(&res->valid_buffer_range); - if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) { + if (rscreen->b.debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) { fprintf(stderr, "VM start=0x%llX end=0x%llX | Buffer %u bytes\n", r600_resource_va(&rscreen->b.b, &res->b.b), r600_resource_va(&rscreen->b.b, &res->b.b) + res->buf->size, diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index d9f2ed2dc01..4527673172e 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -42,20 +42,7 @@ #include "radeon/radeon_uvd.h" #include "os/os_time.h" -static const struct debug_named_value debug_options[] = { - /* logging */ - { "texdepth", DBG_TEX_DEPTH, "Print texture depth info" }, - { "compute", DBG_COMPUTE, "Print compute info" }, - { "vm", DBG_VM, "Print virtual addresses when creating resources" }, - { "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_.c file with faulty cs" }, - - /* shaders */ - { "fs", DBG_FS, "Print fetch shaders" }, - { "vs", DBG_VS, "Print vertex shaders" }, - { "gs", DBG_GS, "Print geometry shaders" }, - { "ps", DBG_PS, "Print pixel shaders" }, - { "cs", DBG_CS, "Print compute shaders" }, - +static const struct debug_named_value r600_debug_options[] = { /* features */ { "nohyperz", DBG_NO_HYPERZ, "Disable Hyper-Z" }, #if defined(R600_USE_LLVM) @@ -448,7 +435,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void rctx->b.rings.gfx.flushing = false; rctx->b.rings.dma.cs = NULL; - if (rscreen->b.info.r600_has_dma && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) { + if (rscreen->b.info.r600_has_dma && !(rscreen->b.debug_flags & DBG_NO_ASYNC_DMA)) { rctx->b.rings.dma.cs = rctx->b.ws->cs_create(rctx->b.ws, RING_DMA, NULL); rctx->b.rings.dma.flush = r600_flush_dma_ring; rctx->b.ws->cs_set_flush_callback(rctx->b.rings.dma.cs, r600_flush_dma_from_winsys, rctx); @@ -1212,17 +1199,17 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) r600_common_screen_init(&rscreen->b, ws); - rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", debug_options, 0); + rscreen->b.debug_flags |= debug_get_flags_option("R600_DEBUG", r600_debug_options, 0); if (debug_get_bool_option("R600_DEBUG_COMPUTE", FALSE)) - rscreen->debug_flags |= DBG_COMPUTE; + rscreen->b.debug_flags |= DBG_COMPUTE; if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE)) - rscreen->debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS; + rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS; if (!debug_get_bool_option("R600_HYPERZ", TRUE)) - rscreen->debug_flags |= DBG_NO_HYPERZ; + rscreen->b.debug_flags |= DBG_NO_HYPERZ; if (!debug_get_bool_option("R600_LLVM", TRUE)) - rscreen->debug_flags |= DBG_NO_LLVM; + rscreen->b.debug_flags |= DBG_NO_LLVM; if (debug_get_bool_option("R600_PRINT_TEXDEPTH", FALSE)) - rscreen->debug_flags |= DBG_TEX_DEPTH; + rscreen->b.debug_flags |= DBG_TEX_DEPTH; if (rscreen->b.family == CHIP_UNKNOWN) { fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->b.info.pci_id); @@ -1272,7 +1259,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) } rscreen->has_cp_dma = rscreen->b.info.drm_minor >= 27 && - !(rscreen->debug_flags & DBG_NO_CP_DMA); + !(rscreen->b.debug_flags & DBG_NO_CP_DMA); if (r600_init_tiling(rscreen)) { FREE(rscreen); @@ -1321,7 +1308,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) rscreen->global_pool = compute_memory_pool_new(rscreen); rscreen->cs_count = 0; - if (rscreen->b.info.drm_minor >= 28 && (rscreen->debug_flags & DBG_TRACE_CS)) { + if (rscreen->b.info.drm_minor >= 28 && (rscreen->b.debug_flags & DBG_TRACE_CS)) { rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->b.b, PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING, diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index f41c0b58088..53d253639b1 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -201,18 +201,8 @@ struct r600_pipe_fences { pipe_mutex mutex; }; -/* logging */ -#define DBG_TEX_DEPTH (1 << 0) -#define DBG_COMPUTE (1 << 1) -#define DBG_VM (1 << 2) -#define DBG_TRACE_CS (1 << 3) -/* shaders */ -#define DBG_FS (1 << 8) -#define DBG_VS (1 << 9) -#define DBG_GS (1 << 10) -#define DBG_PS (1 << 11) -#define DBG_CS (1 << 12) /* features */ +/* This must start from 16. */ #define DBG_NO_HYPERZ (1 << 16) #define DBG_NO_LLVM (1 << 17) #define DBG_NO_CP_DMA (1 << 18) @@ -236,7 +226,6 @@ struct r600_tiling_info { struct r600_screen { struct r600_common_screen b; - unsigned debug_flags; bool has_streamout; bool has_msaa; bool has_cp_dma; diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index ce15cd7e5a9..a5d330e5f34 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -99,13 +99,13 @@ static bool r600_can_dump_shader(struct r600_screen *rscreen, unsigned processor { switch (processor_type) { case TGSI_PROCESSOR_VERTEX: - return (rscreen->debug_flags & DBG_VS) != 0; + return (rscreen->b.debug_flags & DBG_VS) != 0; case TGSI_PROCESSOR_GEOMETRY: - return (rscreen->debug_flags & DBG_GS) != 0; + return (rscreen->b.debug_flags & DBG_GS) != 0; case TGSI_PROCESSOR_FRAGMENT: - return (rscreen->debug_flags & DBG_PS) != 0; + return (rscreen->b.debug_flags & DBG_PS) != 0; case TGSI_PROCESSOR_COMPUTE: - return (rscreen->debug_flags & DBG_CS) != 0; + return (rscreen->b.debug_flags & DBG_CS) != 0; default: return false; } @@ -140,8 +140,8 @@ int r600_pipe_shader_create(struct pipe_context *ctx, int r, i; uint32_t *ptr; bool dump = r600_can_dump_shader(rctx->screen, tgsi_get_processor_type(sel->tokens)); - unsigned use_sb = !(rctx->screen->debug_flags & DBG_NO_SB); - unsigned sb_disasm = use_sb || (rctx->screen->debug_flags & DBG_SB_DISASM); + unsigned use_sb = !(rctx->screen->b.debug_flags & DBG_NO_SB); + unsigned sb_disasm = use_sb || (rctx->screen->b.debug_flags & DBG_SB_DISASM); shader->shader.bc.isa = rctx->isa; @@ -924,7 +924,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, bool indirect_gprs; #ifdef R600_USE_LLVM - use_llvm = !(rscreen->debug_flags & DBG_NO_LLVM); + use_llvm = !(rscreen->b.debug_flags & DBG_NO_LLVM); #endif ctx.bc = &shader->bc; ctx.shader = shader; diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index 508340826e7..b49258288c0 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -490,7 +490,7 @@ r600_texture_create_object(struct pipe_screen *screen, if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER | R600_RESOURCE_FLAG_FLUSHED_DEPTH)) && util_format_is_depth_or_stencil(base->format) && rscreen->b.info.drm_minor >= 26 && - !(rscreen->debug_flags & DBG_NO_HYPERZ) && + !(rscreen->b.debug_flags & DBG_NO_HYPERZ) && base->target == PIPE_TEXTURE_2D && rtex->surface.level[0].nblk_x >= 32 && rtex->surface.level[0].nblk_y >= 32) { @@ -541,7 +541,7 @@ r600_texture_create_object(struct pipe_screen *screen, rtex->cmask.offset, rtex->cmask.size, 0xCC); } - if (rscreen->debug_flags & DBG_VM) { + if (rscreen->b.debug_flags & DBG_VM) { fprintf(stderr, "VM start=0x%llX end=0x%llX | Texture %ix%ix%i, %i levels, %i samples, %s\n", r600_resource_va(screen, &rtex->resource.b.b), r600_resource_va(screen, &rtex->resource.b.b) + rtex->resource.buf->size, @@ -549,7 +549,7 @@ r600_texture_create_object(struct pipe_screen *screen, base->nr_samples ? base->nr_samples : 1, util_format_short_name(base->format)); } - if (rscreen->debug_flags & DBG_TEX_DEPTH && rtex->is_depth && rtex->non_disp_tiling) { + if (rscreen->b.debug_flags & DBG_TEX_DEPTH && rtex->is_depth && rtex->non_disp_tiling) { printf("Texture: npix_x=%u, npix_y=%u, npix_z=%u, blk_w=%u, " "blk_h=%u, blk_d=%u, array_size=%u, last_level=%u, " "bpe=%u, nsamples=%u, flags=%u\n", diff --git a/src/gallium/drivers/r600/sb/sb_core.cpp b/src/gallium/drivers/r600/sb/sb_core.cpp index f16a0ffa3cd..b5dd88ed96d 100644 --- a/src/gallium/drivers/r600/sb/sb_core.cpp +++ b/src/gallium/drivers/r600/sb/sb_core.cpp @@ -57,7 +57,7 @@ sb_context *r600_sb_context_create(struct r600_context *rctx) { sctx = NULL; } - unsigned df = rctx->screen->debug_flags; + unsigned df = rctx->screen->b.debug_flags; sb_context::dump_pass = df & DBG_SB_DUMP; sb_context::dump_stat = df & DBG_SB_STAT; diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index cdfdc19bd0e..9d68f4ba7ab 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -26,6 +26,23 @@ #include "r600_pipe_common.h" +static const struct debug_named_value common_debug_options[] = { + /* logging */ + { "texdepth", DBG_TEX_DEPTH, "Print texture depth info" }, + { "compute", DBG_COMPUTE, "Print compute info" }, + { "vm", DBG_VM, "Print virtual addresses when creating resources" }, + { "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_.c file with faulty cs" }, + + /* shaders */ + { "fs", DBG_FS, "Print fetch shaders" }, + { "vs", DBG_VS, "Print vertex shaders" }, + { "gs", DBG_GS, "Print geometry shaders" }, + { "ps", DBG_PS, "Print pixel shaders" }, + { "cs", DBG_CS, "Print compute shaders" }, + + DEBUG_NAMED_VALUE_END /* must be last */ +}; + void r600_common_screen_init(struct r600_common_screen *rscreen, struct radeon_winsys *ws) { @@ -34,6 +51,7 @@ void r600_common_screen_init(struct r600_common_screen *rscreen, rscreen->ws = ws; rscreen->family = rscreen->info.family; rscreen->chip_class = rscreen->info.chip_class; + rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0); } bool r600_common_context_init(struct r600_common_context *rctx, diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index d83876df824..63bc9b1fade 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -59,6 +59,20 @@ #define R600_CONTEXT_WAIT_3D_IDLE (1 << 17) #define R600_CONTEXT_WAIT_CP_DMA_IDLE (1 << 18) +/* Debug flags. */ +/* logging */ +#define DBG_TEX_DEPTH (1 << 0) +#define DBG_COMPUTE (1 << 1) +#define DBG_VM (1 << 2) +#define DBG_TRACE_CS (1 << 3) +/* shaders */ +#define DBG_FS (1 << 8) +#define DBG_VS (1 << 9) +#define DBG_GS (1 << 10) +#define DBG_PS (1 << 11) +#define DBG_CS (1 << 12) +/* The maximum allowed bit is 15. */ + struct r600_common_context; struct r600_resource { @@ -136,6 +150,7 @@ struct r600_common_screen { enum radeon_family family; enum chip_class chip_class; struct radeon_info info; + unsigned debug_flags; }; /* This encapsulates a state or an operation which can emitted into the GPU -- 2.30.2