From bacbcafec16c1ff106aa8c01f70d6eea28c5ac79 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 24 Oct 2017 09:53:32 -0700 Subject: [PATCH] broadcom/vc5: Always set up 1D textures as raster order. 1D is the exception to "all V3D textures are tiled", since tiling 1D textures would just waste memory and cache space. This ended up being a problem once we started actually marking 1D textures as 1D instead of 2D. --- src/gallium/drivers/vc5/vc5_resource.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/vc5/vc5_resource.c b/src/gallium/drivers/vc5/vc5_resource.c index 42d58791f6c..45f94af0346 100644 --- a/src/gallium/drivers/vc5/vc5_resource.c +++ b/src/gallium/drivers/vc5/vc5_resource.c @@ -526,6 +526,11 @@ vc5_resource_create_with_modifiers(struct pipe_screen *pscreen, if (tmpl->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR)) should_tile = false; + /* 1D and 1D_ARRAY textures are always raster-order. */ + if (tmpl->target == PIPE_TEXTURE_1D || + tmpl->target == PIPE_TEXTURE_1D_ARRAY) + should_tile = false; + /* Scanout BOs for simulator need to be linear for interaction with * i965. */ -- 2.30.2