From baff1792bbea0fb625537ac82482b48f7ecedff2 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 10 Oct 2022 17:20:22 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls002/discussion.mdwn | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/openpower/sv/rfc/ls002/discussion.mdwn b/openpower/sv/rfc/ls002/discussion.mdwn index 22e631d08..a81eb0c19 100644 --- a/openpower/sv/rfc/ls002/discussion.mdwn +++ b/openpower/sv/rfc/ls002/discussion.mdwn @@ -106,9 +106,9 @@ acknowledged. will edit. done v3.1B, done EFGH. 1.6.2 (additional use for d0,d1,d2), and Appendix D (Opcode Maps). ** -ditto. TODO. +ditto. done 1.6.2 (FRS) -missed the addition to 1.6.1.6 (DX-Form). TODO +missed the addition to 1.6.1.6 (DX-Form). done ** 3. Does the last line of the Summary apply to both instructions or just to @@ -152,8 +152,8 @@ as a critical means of bootstrapping (constructing 64 bit addresses) That doesn't actually clear FRT to zero because `NaN - NaN` and `Inf - Inf` both equal `NaN`, not zero. Also, with "round to -inf", 0 - 0 produces -0, not 0. Thus use of `fsub` is critically -dependent on the contents of registers and status flags, where -`flis` is not. +dependent on the contents of registers and status flags, and +would require more instructions, where `flis` is not. ** 5. "FRS" for both instructions should be changed to "FRT". ("FRS" normally @@ -173,7 +173,7 @@ RTL error corrected. ack on FRT. consistent with this usage. ** -acknowledged. TODO. +acknowledged. done. ** 8. More generally, the style of the verbal description for both instructions -- 2.30.2