From bb092e5a54b1caf855f5249ae37e22243ab5d549 Mon Sep 17 00:00:00 2001 From: Raptor Engineering Development Team Date: Tue, 1 Mar 2022 15:24:04 -0600 Subject: [PATCH] Add missing mapping between HAS and USE for Liteeth and Tercel on Arctic Tern --- fpga/top-rcs-arctic-tern-bmc-card.vhdl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fpga/top-rcs-arctic-tern-bmc-card.vhdl b/fpga/top-rcs-arctic-tern-bmc-card.vhdl index f441cac..3b02aa3 100644 --- a/fpga/top-rcs-arctic-tern-bmc-card.vhdl +++ b/fpga/top-rcs-arctic-tern-bmc-card.vhdl @@ -169,6 +169,8 @@ begin SPI_FLASH_DEF_CKDV => SPI_FLASH_DEF_CKDV, SPI_FLASH_DEF_QUAD => SPI_FLASH_DEF_QUAD, LOG_LENGTH => LOG_LENGTH, + HAS_LITEETH => USE_LITEETH, + HAS_TERCEL => USE_TERCEL, UART0_IS_16550 => UART_IS_16550, HAS_UART1 => HAS_UART1, ICACHE_NUM_LINES => ICACHE_NUM_LINES -- 2.30.2