From bb9a2dcc50b656e07accaf1036edb3607ea82f6c Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Thu, 3 Jun 2021 10:58:53 -0700 Subject: [PATCH] bitwise moves never set exceptions or mess with FPSCR --- openpower/sv/int_fp_mv.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index f28da1fe4..dfb93c1da 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -129,7 +129,7 @@ move a 32-bit float from a GPR to a FPR, just copying bits. Converts the 32-bit float in `RA` to a 64-bit float, then writes the 64-bit float to `FRT`. -TODO: Rc=1 variants? also, any exceptions or FPSCR bits set? +TODO: Rc=1 variants? ### Float load immediate (kinda a variant of `fmvfg`) -- 2.30.2