From bba72f03ddd6db370e8fd5afbf14f4f89d0c7e3e Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 19 Jul 2019 11:54:26 -0700 Subject: [PATCH] Do not $mul -> $__mul if A and B are less than maxwidth --- techlibs/common/mul2dsp.v | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/techlibs/common/mul2dsp.v b/techlibs/common/mul2dsp.v index aab568c9f..5444d842a 100644 --- a/techlibs/common/mul2dsp.v +++ b/techlibs/common/mul2dsp.v @@ -28,7 +28,9 @@ module \$mul (A, B, Y); output [Y_WIDTH-1:0] Y; generate - if (A_SIGNED != B_SIGNED || A_WIDTH <= 1 || B_WIDTH <= 1) + if (A_SIGNED != B_SIGNED) + wire _TECHMAP_FAIL_ = 1; + else if (A_WIDTH <= `DSP_A_MAXWIDTH && B_WIDTH <= `DSP_B_MAXWIDTH) wire _TECHMAP_FAIL_ = 1; // NB: A_SIGNED == B_SIGNED == 0 from here else if (A_WIDTH >= B_WIDTH) -- 2.30.2