From bbaa46c0f3f297bf776d9a171a7442e8a6f7a024 Mon Sep 17 00:00:00 2001 From: Andrew Bennett Date: Tue, 8 Apr 2014 14:50:42 +0100 Subject: [PATCH] Add support for the MIPS P5600 family of CPUs. ChangeLog: 2014-04-10 Andrew Bennett * config/tc-mips.c (mips_cpu_info_table): Add P5600 configuation. * doc/c-mips.texi: Document p5600. --- gas/ChangeLog | 6 ++++++ gas/config/tc-mips.c | 2 ++ gas/doc/c-mips.texi | 1 + 3 files changed, 9 insertions(+) diff --git a/gas/ChangeLog b/gas/ChangeLog index 62f5138d1a4..326b47cc46c 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2014-04-10 Andrew Bennett + + * config/tc-mips.c (mips_cpu_info_table): Add P5600 + configuation. + * doc/c-mips.texi: Document p5600. + 2014-04-09 Nick Clifton * config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 318b0b56cff..47de8d38692 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -17902,6 +17902,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "1004kf2_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, { "1004kf", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, { "1004kf1_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + /* P5600 with EVA and Virtualization ASEs, other ASEs are optional. */ + { "p5600", 0, ASE_VIRT | ASE_EVA, ISA_MIPS32R2, CPU_MIPS32R2 }, /* MIPS 64 */ { "5kc", 0, 0, ISA_MIPS64, CPU_MIPS64 }, diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 184915e3503..3778ae203ea 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -337,6 +337,7 @@ m14kec, 1004kf2_1, 1004kf, 1004kf1_1, +p5600, 5kc, 5kf, 20kc, -- 2.30.2