From bbbc9fd8e5e2a4434c8630eacd7943d59aa73c47 Mon Sep 17 00:00:00 2001 From: Anuj Phogat Date: Thu, 9 Jul 2015 10:47:17 -0700 Subject: [PATCH] i965: Use helper function intel_get_tile_dims() in surface setup It takes care of using the correct tile width if we later use other tiling patterns for aux miptree. V2: Remove the comment about using Yf for aux miptree. Signed-off-by: Anuj Phogat Reviewed-by: Chad Versace --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index d2f333fd4dd..c5f1bae8ecb 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -276,8 +276,13 @@ gen8_emit_texture_surface_state(struct brw_context *brw, } if (aux_mt) { + uint32_t tile_w, tile_h; + assert(aux_mt->tiling == I915_TILING_Y); + intel_get_tile_dims(aux_mt->tiling, aux_mt->tr_mode, + aux_mt->cpp, &tile_w, &tile_h); surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) | - SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) | + SET_FIELD((aux_mt->pitch / tile_w) - 1, + GEN8_SURFACE_AUX_PITCH) | aux_mode; } else { surf[6] = 0; @@ -501,8 +506,13 @@ gen8_update_renderbuffer_surface(struct brw_context *brw, } if (aux_mt) { + uint32_t tile_w, tile_h; + assert(aux_mt->tiling == I915_TILING_Y); + intel_get_tile_dims(aux_mt->tiling, aux_mt->tr_mode, + aux_mt->cpp, &tile_w, &tile_h); surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) | - SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) | + SET_FIELD((aux_mt->pitch / tile_w) - 1, + GEN8_SURFACE_AUX_PITCH) | aux_mode; } else { surf[6] = 0; -- 2.30.2