From bbbfdee2ed4feb5e8e448920e5d51701a2192ee1 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 8 Nov 2009 22:49:58 -0800 Subject: [PATCH] X86: Don't panic on faults on prefetches in SE mode. --- src/arch/x86/tlb.cc | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 0d69d05c9..d7959da2c 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -637,17 +637,21 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation, success = p->pTable->lookup(vaddr, newEntry); } if (!success) { - const char *modeStr = ""; - if (mode == Execute) - modeStr = "execute"; - else if (mode == Read) - modeStr = "read"; - else if (mode == Write) - modeStr = "write"; - else - modeStr = "?"; - panic("Tried to %s unmapped address %#x.\n", - modeStr, vaddr); + if (req->isPrefetch()) { + return new PageFault(vaddr, true, mode, true, false); + } else { + const char *modeStr = ""; + if (mode == Execute) + modeStr = "execute"; + else if (mode == Read) + modeStr = "read"; + else if (mode == Write) + modeStr = "write"; + else + modeStr = "?"; + panic("Tried to %s unmapped address %#x.\n", + modeStr, vaddr); + } } else { Addr alignedVaddr = p->pTable->pageAlign(vaddr); DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, -- 2.30.2