From bbee738e866cc755b11aebf596533969a4c418cf Mon Sep 17 00:00:00 2001 From: "Frank Ch. Eigler" Date: Thu, 7 May 1998 17:43:38 +0000 Subject: [PATCH] * Converted conditional-trap MIPS opcodes to extra-operand variety also. Thu May 7 12:49:46 1998 Frank Ch. Eigler * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand variety of ISA2 instructions to set bottom ten bits of trap code. --- opcodes/ChangeLog | 5 +++++ opcodes/mips-opc.c | 18 ++++++++++++------ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 832a0f72aca..9f873fc2e7f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +Thu May 7 12:49:46 1998 Frank Ch. Eigler + + * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand + variety of ISA2 instructions to set bottom ten bits of trap code. + Thu May 7 11:54:25 1998 Ian Lance Taylor * Makefile.am (config.status): Add explicit target so that diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index d5a15207251..0356c5d040b 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -1035,15 +1035,18 @@ const struct mips_opcode mips_builtin_opcodes[] = { {"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 }, {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 }, {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, -{"teq", "s,t", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, +{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, +{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */ {"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 }, {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, -{"tge", "s,t", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, +{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, +{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */ {"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 }, {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, -{"tgeu", "s,t", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, +{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, +{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */ {"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 }, {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 }, @@ -1051,15 +1054,18 @@ const struct mips_opcode mips_builtin_opcodes[] = { {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 }, {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 }, {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, -{"tlt", "s,t", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, +{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, +{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */ {"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 }, {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, -{"tltu", "s,t", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, +{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, +{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */ {"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 }, {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, -{"tne", "s,t", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, +{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, +{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */ {"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 }, {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 }, -- 2.30.2