From bd267fd1f9de8d22922cb599aff67f3869243020 Mon Sep 17 00:00:00 2001
From: Andre Vieira <andre.simoesdiasvieira@arm.com>
Date: Fri, 17 Jan 2020 14:19:35 +0000
Subject: [PATCH] Forgot to add testcases to commit for [binutils][arm] PR25376
 Change MVE ...

The original commit was 2da2eaf4ce299c84c5a1f1bc6f7944266cb36d6e
---
 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d | 7 +++++++
 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s | 7 +++++++
 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d | 8 ++++++++
 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s | 8 ++++++++
 4 files changed, 30 insertions(+)
 create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d
 create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s
 create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d
 create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s

diff --git a/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d
new file mode 100644
index 00000000000..b7d03df44a5
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d
@@ -0,0 +1,7 @@
+#name: Make sure .fpu does not reset MVE feature bits
+#objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> ef22 0844 	vadd.i32	q0, q1, q2
diff --git a/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s
new file mode 100644
index 00000000000..ff5ae738da4
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s
@@ -0,0 +1,7 @@
+.arch armv8.1-m.main
+.arch_extension mve
+.fpu fpv5-sp-d16
+.syntax unified
+.thumb
+.text
+vadd.i32 q0, q1, q2
diff --git a/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d
new file mode 100644
index 00000000000..479f00f91cb
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d
@@ -0,0 +1,8 @@
+#name: Make sure .fpu does not reset MVE feature bits but still adds extra bits
+#objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> ef22 0844 	vadd.i32	q0, q1, q2
+0[0-9a-f]+ <[^>]+> ee31 0b02 	vadd.f64	d0, d1, d2
diff --git a/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s
new file mode 100644
index 00000000000..80f4e4793ea
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s
@@ -0,0 +1,8 @@
+.arch armv8.1-m.main
+.arch_extension mve
+.fpu fpv5-d16
+.syntax unified
+.thumb
+.text
+vadd.i32 q0, q1, q2
+vadd.f64 d0, d1, d2
-- 
2.30.2