From bdaeccaeec3b376e6750c608ab8040596641a0a1 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 Dec 2021 12:55:03 +0000 Subject: [PATCH] add msr to MMU Op Subset record --- src/soc/fu/mmu/mmu_input_record.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/fu/mmu/mmu_input_record.py b/src/soc/fu/mmu/mmu_input_record.py index 079c2e9f..54256ca5 100644 --- a/src/soc/fu/mmu/mmu_input_record.py +++ b/src/soc/fu/mmu/mmu_input_record.py @@ -14,6 +14,7 @@ class CompMMUOpSubset(CompOpSubsetBase): ('fn_unit', Function), ('insn', 32), ('nia', 64), # for instruction fault (MMU PTE lookup) + ('msr', 64), # ditto, to set priv_mode etc. ('zero_a', 1), ) super().__init__(layout, name=name) -- 2.30.2