From bdcacaed9c64c49827d325d15ada2c482bfe1578 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Tue, 8 Oct 2013 22:09:28 +1300 Subject: [PATCH] i965: relax brw_texture_offset assert Some texturing ops are about to have nonconstant offset support; the offset in the header in these cases should be zero. Signed-off-by: Chris Forbes Reviewed-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +- src/mesa/drivers/dri/i965/brw_shader.cpp | 9 +++++++-- src/mesa/drivers/dri/i965/brw_shader.h | 2 +- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 +- 4 files changed, 10 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 9f37013bddf..7dabc4767dc 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1596,7 +1596,7 @@ fs_visitor::visit(ir_texture *ir) } if (ir->offset != NULL && ir->op != ir_txf) - inst->texture_offset = brw_texture_offset(ir->offset->as_constant()); + inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant()); if (ir->op == ir_tg4) inst->texture_offset |= gather_channel(ir, sampler) << 16; // M0.2:16-17 diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 2fb43a6b4e6..df905fbc906 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -372,9 +372,14 @@ brw_math_function(enum opcode op) } uint32_t -brw_texture_offset(ir_constant *offset) +brw_texture_offset(struct gl_context *ctx, ir_constant *offset) { - assert(offset != NULL); + /* If the driver does not support GL_ARB_gpu_shader5, the offset + * must be constant. + */ + assert(offset != NULL || ctx->Extensions.ARB_gpu_shader5); + + if (!offset) return 0; /* nonconstant offset; caller will handle it. */ signed char offsets[3]; for (unsigned i = 0; i < offset->type->vector_elements; i++) diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index 7cebf1ffdd1..cc76a44493b 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -77,7 +77,7 @@ public: void assign_common_binding_table_offsets(uint32_t next_binding_table_offset); }; -uint32_t brw_texture_offset(ir_constant *offset); +uint32_t brw_texture_offset(struct gl_context *ctx, ir_constant *offset); #endif /* __cplusplus */ diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index c163c943680..68d6cd92532 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2286,7 +2286,7 @@ vec4_visitor::visit(ir_texture *ir) inst->shadow_compare = ir->shadow_comparitor != NULL; if (use_texture_offset) - inst->texture_offset = brw_texture_offset(ir->offset->as_constant()); + inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant()); /* Stuff the channel select bits in the top of the texture offset */ if (ir->op == ir_tg4) -- 2.30.2