From bde7f9a0c9e97c3e2b328d9507742180bc258132 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 12 Mar 2022 17:04:34 +0000 Subject: [PATCH] --- openpower/sv/bitmanip.mdwn | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn index 2467873f4..a2b58daa6 100644 --- a/openpower/sv/bitmanip.mdwn +++ b/openpower/sv/bitmanip.mdwn @@ -52,8 +52,7 @@ ternlog has its own major opcode | -00 |1 | grevlog | | -01 | | grevlogi | | 010 |Rc| bitmask | -| 011 |0 | gfbmadd* | -| 011 |1 | clmadd* | +| 011 | | gf/cl madd* | | 110 |Rc| 1/2-op | | 111 | | | @@ -91,14 +90,17 @@ TODO: convert all instructions to use RT and not RS | 0.5|6.10|11.15|16.20 |21..25 | 26....30 |31| name | | -- | -- | --- | --- | ----- | -------- |--| ------ | -| NN | RT | RA | RB | im0-4 | im5-7 00 |0 | | +| NN | RT | RA | RB | | 00 |0 | rsvd | | NN | RT | RA | RB | im0-4 | im5-7 00 |1 | grevlog | | NN | RT | RA | s0-4 | im0-4 | im5-7 01 |s5| grevlogi | +| NN | RT | RA | RB | sh0-4 | sh5 1 010 |Rc| bmrevi | | NN | RS | RA | RB | RC | 00 011 |0 | gfbmadd | -| NN | RS | RA | RB | RC | 10 011 |0 | gfbmaddsub | -| NN | RS | RA | RB | RC | 00 011 |1 | clmadd | -| NN | RS | RA | RB | RC | 10 011 |1 | clmaddsub | -| NN | RT | RA | RB | sh0-4 | sh5 1 011 |Rc| bmrevi | +| NN | RS | RA | RB | RC | 00 011 |1 | gfbmaddsub | +| NN | RS | RA | RB | RC | 01 011 |0 | clmadd | +| NN | RS | RA | RB | RC | 01 011 |1 | clmaddsub | +| NN | RS | RA | RB | RC | 10 011 |0 | gfpmadd | +| NN | RS | RA | RB | RC | 10 011 |1 | gfpmaddsub | +| NN | RS | RA | RB | RC | 11 011 | | rsvd | ops (note that av avg and abs as well as vec scalar mask are included here) -- 2.30.2