From bdf6ae1b6caf8ae21c563ac299bcf7250fd9a148 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 7 Jun 2020 13:26:58 +0100 Subject: [PATCH] add missing arg to ISA in test_compunit --- src/soc/fu/compunits/test/test_compunit.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/fu/compunits/test/test_compunit.py b/src/soc/fu/compunits/test/test_compunit.py index 67e7025f..42bfad75 100644 --- a/src/soc/fu/compunits/test/test_compunit.py +++ b/src/soc/fu/compunits/test/test_compunit.py @@ -142,7 +142,8 @@ class TestRunner(FHDLTestCase): program = test.program self.subTest(test.name) print ("test", test.name, test.mem) - sim = ISA(pdecode2, test.regs, test.sprs, test.cr, test.mem) + sim = ISA(pdecode2, test.regs, test.sprs, test.cr, test.mem, + test.msr) gen = program.generate_instructions() instructions = list(zip(gen, program.assembly.splitlines())) -- 2.30.2