From bdfa8b951ba38b15487eab2a754b9a33b9f29634 Mon Sep 17 00:00:00 2001 From: Matthew Wahab Date: Tue, 16 Jun 2015 14:15:54 +0100 Subject: [PATCH] [AArch64] Support id_mmfr4 system register 2015-06-16 Matthew Wahab opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1". gas/testsuite * sysreg.d: Add id_mmfr4_el1, update expected output. * sysreg.s: Add id_mmfr4_el1. --- gas/testsuite/ChangeLog | 5 +++++ gas/testsuite/gas/aarch64/sysreg.d | 23 ++++++++++++----------- gas/testsuite/gas/aarch64/sysreg.s | 1 + opcodes/ChangeLog | 4 ++++ opcodes/aarch64-opc.c | 1 + 5 files changed, 23 insertions(+), 11 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 8ab97c8015e..245f6c34565 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-06-16 Matthew Wahab + + * sysreg.d: Add id_mmfr4_el1, update expected output. + * sysreg.s: Add id_mmfr4_el1. + 2015-06-15 Renlin Li * gas/aarch64/reloc-insn.s: Update test diff --git a/gas/testsuite/gas/aarch64/sysreg.d b/gas/testsuite/gas/aarch64/sysreg.d index 7795b4dd30e..157340cd5a1 100644 --- a/gas/testsuite/gas/aarch64/sysreg.d +++ b/gas/testsuite/gas/aarch64/sysreg.d @@ -17,14 +17,15 @@ Disassembly of section \.text: 24: d53801a0 mrs x0, id_mmfr1_el1 28: d53801c0 mrs x0, id_mmfr2_el1 2c: d53801e0 mrs x0, id_mmfr3_el1 - 30: d5380200 mrs x0, id_isar0_el1 - 34: d5380220 mrs x0, id_isar1_el1 - 38: d5380240 mrs x0, id_isar2_el1 - 3c: d5380260 mrs x0, id_isar3_el1 - 40: d5380280 mrs x0, id_isar4_el1 - 44: d53802a0 mrs x0, id_isar5_el1 - 48: d538cc00 mrs x0, s3_0_c12_c12_0 - 4c: d5384600 mrs x0, s3_0_c4_c6_0 - 50: d5184600 msr s3_0_c4_c6_0, x0 - 54: d5310300 mrs x0, s2_1_c0_c3_0 - 58: d5110300 msr s2_1_c0_c3_0, x0 + 30: d53802c0 mrs x0, id_mmfr4_el1 + 34: d5380200 mrs x0, id_isar0_el1 + 38: d5380220 mrs x0, id_isar1_el1 + 3c: d5380240 mrs x0, id_isar2_el1 + 40: d5380260 mrs x0, id_isar3_el1 + 44: d5380280 mrs x0, id_isar4_el1 + 48: d53802a0 mrs x0, id_isar5_el1 + 4c: d538cc00 mrs x0, s3_0_c12_c12_0 + 50: d5384600 mrs x0, s3_0_c4_c6_0 + 54: d5184600 msr s3_0_c4_c6_0, x0 + 58: d5310300 mrs x0, s2_1_c0_c3_0 + 5c: d5110300 msr s2_1_c0_c3_0, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg.s b/gas/testsuite/gas/aarch64/sysreg.s index b7e5ff6ca1f..897467409c4 100644 --- a/gas/testsuite/gas/aarch64/sysreg.s +++ b/gas/testsuite/gas/aarch64/sysreg.s @@ -16,6 +16,7 @@ mrs x0, id_mmfr1_el1 mrs x0, id_mmfr2_el1 mrs x0, id_mmfr3_el1 + mrs x0, id_mmfr4_el1 mrs x0, id_isar0_el1 mrs x0, id_isar1_el1 mrs x0, id_isar2_el1 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index fe9134d4032..d76ad3bcd96 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2015-06-16 Matthew Wahab + + * arch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1". + 2015-06-16 Szabolcs Nagy * arm-dis.c (print_insn_coprocessor): Avoid negative shift. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 5c7ef868cc8..9880142873e 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -2772,6 +2772,7 @@ const aarch64_sys_reg aarch64_sys_regs [] = { "id_mmfr1_el1", CPENC(3,0,C0,C1,5), 0 }, /* RO */ { "id_mmfr2_el1", CPENC(3,0,C0,C1,6), 0 }, /* RO */ { "id_mmfr3_el1", CPENC(3,0,C0,C1,7), 0 }, /* RO */ + { "id_mmfr4_el1", CPENC(3,0,C0,C2,6), 0 }, /* RO */ { "id_isar0_el1", CPENC(3,0,C0,C2,0), 0 }, /* RO */ { "id_isar1_el1", CPENC(3,0,C0,C2,1), 0 }, /* RO */ { "id_isar2_el1", CPENC(3,0,C0,C2,2), 0 }, /* RO */ -- 2.30.2