From be07b9e8a4766445ad93ee7da144f3271bf8a34f Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 2 Oct 2021 20:33:04 +0100 Subject: [PATCH] --- 3d_gpu/architecture/dynamic_simd.mdwn | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn index e5eacd72c..c6741dc8b 100644 --- a/3d_gpu/architecture/dynamic_simd.mdwn +++ b/3d_gpu/architecture/dynamic_simd.mdwn @@ -126,8 +126,17 @@ basic HDL is literally an order of magnitude larger: # Alternative implementation concepts Several alternative ideas have been proposed. They are listed here for -completeness. - +completeness. The worst offender (use code-duplication) has already been +raised. + +* **Explicit Code**. For every ALU, write code which is inherently + parallel, rather than duplicated with a series of Switch/Case or + an if-elif-elif chain based on what the partition mask is set to. +* **Use a low-level class**. Rather than tie in to nmigen, write a + class that performs all the equivalent (explicit coded) parallel + operations, as close to nmigen Type 1 (AST) constructs as possible. + Alternatives to Cat, called SIMDCat, and forego use of Type 2 + (dsl.Module) nmigen language constructs entirely. * **Wrapper classes**. A dsl.Module wrapper class which duplicates the entirety of the dsl.Module functionality with "redirection" functions and a dsl.Module instance as a member variable. In the rare instances -- 2.30.2