From bf542cd37286decbd9fc0c939007b82176e16a81 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 5 Aug 2014 13:33:50 -0700 Subject: [PATCH] vc4: Add support for the TGSI TRUNC opcode. v2: Rebase on helpers. --- src/gallium/drivers/vc4/vc4_program.c | 11 +++++++++++ src/gallium/drivers/vc4/vc4_qir.c | 1 + src/gallium/drivers/vc4/vc4_qir.h | 2 ++ src/gallium/drivers/vc4/vc4_qpu_emit.c | 1 + 4 files changed, 15 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 3f52588ada8..307eda02cbe 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -292,6 +292,16 @@ tgsi_to_qir_pow(struct tgsi_to_qir *trans, qir_LOG2(c, src[0 * 4 + 0]))); } +static struct qreg +tgsi_to_qir_trunc(struct tgsi_to_qir *trans, + struct tgsi_full_instruction *tgsi_inst, + enum qop op, struct qreg *src, int i) +{ + struct qcompile *c = trans->c; + return qir_ITOF(c, qir_FTOI(c, src[0 * 4 + i])); +} + + static struct qreg tgsi_to_qir_dp(struct tgsi_to_qir *trans, struct tgsi_full_instruction *tgsi_inst, @@ -413,6 +423,7 @@ emit_tgsi_instruction(struct tgsi_to_qir *trans, [TGSI_OPCODE_LIT] = { 0, tgsi_to_qir_lit }, [TGSI_OPCODE_LRP] = { 0, tgsi_to_qir_lrp }, [TGSI_OPCODE_POW] = { 0, tgsi_to_qir_pow }, + [TGSI_OPCODE_TRUNC] = { 0, tgsi_to_qir_trunc }, }; static int asdf = 0; uint32_t tgsi_op = tgsi_inst->Instruction.Opcode; diff --git a/src/gallium/drivers/vc4/vc4_qir.c b/src/gallium/drivers/vc4/vc4_qir.c index 71f6e87578d..495d16e2a25 100644 --- a/src/gallium/drivers/vc4/vc4_qir.c +++ b/src/gallium/drivers/vc4/vc4_qir.c @@ -52,6 +52,7 @@ static const struct qir_op_info qir_op_info[] = { [QOP_CMP] = { "cmp", 1, 3 }, [QOP_FTOI] = { "ftoi", 1, 1 }, + [QOP_ITOF] = { "itof", 1, 1 }, [QOP_RCP] = { "rcp", 1, 1 }, [QOP_RSQ] = { "rsq", 1, 1 }, [QOP_EXP2] = { "exp2", 1, 2 }, diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index 491748ff05d..753f82e5021 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -59,6 +59,7 @@ enum qop { QOP_CMP, QOP_FTOI, + QOP_ITOF, QOP_RCP, QOP_RSQ, QOP_EXP2, @@ -186,6 +187,7 @@ QIR_ALU2(FMAX) QIR_ALU2(FMINABS) QIR_ALU2(FMAXABS) QIR_ALU1(FTOI) +QIR_ALU1(ITOF) QIR_ALU1(RCP) QIR_ALU1(RSQ) QIR_ALU1(EXP2) diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c index fff086e26e9..847f9babb25 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_emit.c +++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c @@ -249,6 +249,7 @@ vc4_generate_code(struct qcompile *c) A(FMINABS), A(FMAXABS), A(FTOI), + A(ITOF), M(FMUL), }; -- 2.30.2