From bfda0da2e681a013e280ab001dc54b41c7bd4d21 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 21 Apr 2022 10:15:57 +0100 Subject: [PATCH] --- openpower/isa/svfixedarith.mdwn | 65 ++++----------------------------- 1 file changed, 8 insertions(+), 57 deletions(-) diff --git a/openpower/isa/svfixedarith.mdwn b/openpower/isa/svfixedarith.mdwn index 1a1e5fe68..5ed1d283f 100644 --- a/openpower/isa/svfixedarith.mdwn +++ b/openpower/isa/svfixedarith.mdwn @@ -1,38 +1,6 @@ -# Multiply Twin Doubleword +# Twin Multiply and Add Doubleword -XO-Form - -* mulxd RT,RA,RB - -Pseudo-code: - - prod[0:(XLEN*2)-1] <- MULS((RA), (RB)) - RT <- prod[XLEN:(XLEN*2)-1] - RS <- prod[0:XLEN-1] - -Special Registers Altered: - - None - -# Multiply Twin Doubleword Unsigned - -XO-Form - -* mulxdu RT,RA,RB - -Pseudo-code: - - prod[0:(XLEN*2)-1] <- (RA) * (RB) - RT <- prod[XLEN:(XLEN*2)-1] - RS <- prod[0:XLEN-1] - -Special Registers Altered: - - None - -# Twin Multiply and Add Doubleword - -* maddx RT,RA,RB,RC +* madded RT,RA,RB,RC Pseudo-code: @@ -50,35 +18,18 @@ Special Registers Altered: # Twin Multiply and Subtract Doubleword -* msubx RT,RA,RB,RC +* msubed RT,RA,RB,RC Pseudocode: - + + + prod[0:127] <- (RA) * (RB) + sub[0:127] <- EXTZ(RC) - prod RT <- sub[64:127] RS <- sub[0:63] Special Registers Altered: None - -# Twin Add Carry Subtract Doubleword - -* weirdaddx RT,RA,RB - -Pseudocode: - - - cat[0:127] = (RS) || (RB) - sum[0:127] = cat + EXTZ(RA) - 1 - rhi[0:63] = sum[0:63] - if (RA)[0:62] = [0]*63 then rhi = rhi + 1 - RA = rhi - RT = sum[64:127] - -Special Registers Altered: - - None -- 2.30.2