From bff1d59511e3a27123d3cbc68d67ebd01ab90282 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 15 Oct 2019 18:19:18 -0700 Subject: [PATCH] fastmodel: Plumb the ITB and DTB through the IRIS thread context. These might be necessary to, for instance, translate virtual addresses. A custom TLB which uses the IRIS API will be written which can be substituted in for the normal ARM TLB. Change-Id: Ic44822db6692ca3a4ca13875b2260b08547a24da Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22116 Tested-by: kokoro Reviewed-by: Chun-Chen TK Hsu Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini --- src/arch/arm/fastmodel/iris/arm/thread_context.cc | 4 ++-- src/arch/arm/fastmodel/iris/arm/thread_context.hh | 1 + src/arch/arm/fastmodel/iris/cpu.hh | 3 ++- src/arch/arm/fastmodel/iris/thread_context.cc | 6 +++--- src/arch/arm/fastmodel/iris/thread_context.hh | 7 +++++-- 5 files changed, 13 insertions(+), 8 deletions(-) diff --git a/src/arch/arm/fastmodel/iris/arm/thread_context.cc b/src/arch/arm/fastmodel/iris/arm/thread_context.cc index b8e98edcd..8933535b9 100644 --- a/src/arch/arm/fastmodel/iris/arm/thread_context.cc +++ b/src/arch/arm/fastmodel/iris/arm/thread_context.cc @@ -36,10 +36,10 @@ namespace Iris { ArmThreadContext::ArmThreadContext( - ::BaseCPU *cpu, int id, System *system, + ::BaseCPU *cpu, int id, System *system, ::BaseTLB *dtb, ::BaseTLB *itb, iris::IrisConnectionInterface *iris_if, const std::string &iris_path) : - ThreadContext(cpu, id, system, iris_if, iris_path), + ThreadContext(cpu, id, system, dtb, itb, iris_if, iris_path), pcRscId(iris::IRIS_UINT64_MAX) {} diff --git a/src/arch/arm/fastmodel/iris/arm/thread_context.hh b/src/arch/arm/fastmodel/iris/arm/thread_context.hh index f5be14dde..889d27f80 100644 --- a/src/arch/arm/fastmodel/iris/arm/thread_context.hh +++ b/src/arch/arm/fastmodel/iris/arm/thread_context.hh @@ -46,6 +46,7 @@ class ArmThreadContext : public Iris::ThreadContext public: ArmThreadContext(::BaseCPU *cpu, int id, System *system, + ::BaseTLB *dtb, ::BaseTLB *itb, iris::IrisConnectionInterface *iris_if, const std::string &iris_path); diff --git a/src/arch/arm/fastmodel/iris/cpu.hh b/src/arch/arm/fastmodel/iris/cpu.hh index 911743b74..ef839784c 100644 --- a/src/arch/arm/fastmodel/iris/cpu.hh +++ b/src/arch/arm/fastmodel/iris/cpu.hh @@ -135,7 +135,8 @@ class CPU : public Iris::BaseCPU int thread_id = 0; for (const std::string &sub_path: params->thread_paths) { std::string path = parent_path + "." + sub_path; - auto *tc = new TC(this, thread_id++, sys, iris_if, path); + auto *tc = new TC(this, thread_id++, sys, + params->dtb, params->itb,iris_if, path); threadContexts.push_back(tc); } } diff --git a/src/arch/arm/fastmodel/iris/thread_context.cc b/src/arch/arm/fastmodel/iris/thread_context.cc index 1380cf3bf..bccd7f4c0 100644 --- a/src/arch/arm/fastmodel/iris/thread_context.cc +++ b/src/arch/arm/fastmodel/iris/thread_context.cc @@ -159,10 +159,10 @@ ThreadContext::simulationTimeEvent( } ThreadContext::ThreadContext( - BaseCPU *cpu, int id, System *system, + BaseCPU *cpu, int id, System *system, ::BaseTLB *dtb, ::BaseTLB *itb, iris::IrisConnectionInterface *iris_if, const std::string &iris_path) : - _cpu(cpu), _threadId(id), _system(system), _irisPath(iris_path), - _instId(iris::IRIS_UINT64_MAX), _status(Active), + _cpu(cpu), _threadId(id), _system(system), _dtb(dtb), _itb(itb), + _irisPath(iris_path), _instId(iris::IRIS_UINT64_MAX), _status(Active), comInstEventQueue("instruction-based event queue"), client(iris_if, "client." + iris_path) { diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh index bdf12ef8b..c0f40d76c 100644 --- a/src/arch/arm/fastmodel/iris/thread_context.hh +++ b/src/arch/arm/fastmodel/iris/thread_context.hh @@ -55,6 +55,8 @@ class ThreadContext : public ::ThreadContext int _threadId; ContextID _contextId; System *_system; + ::BaseTLB *_dtb; + ::BaseTLB *_itb; std::string _irisPath; iris::InstanceId _instId; @@ -101,6 +103,7 @@ class ThreadContext : public ::ThreadContext public: ThreadContext(::BaseCPU *cpu, int id, System *system, + ::BaseTLB *dtb, ::BaseTLB *itb, iris::IrisConnectionInterface *iris_if, const std::string &iris_path); virtual ~ThreadContext(); @@ -125,12 +128,12 @@ class ThreadContext : public ::ThreadContext BaseTLB * getITBPtr() override { - panic("%s not implemented.", __FUNCTION__); + return _itb; } BaseTLB * getDTBPtr() override { - panic("%s not implemented.", __FUNCTION__); + return _dtb; } CheckerCPU * getCheckerCpuPtr() override -- 2.30.2