From c00cd14fc7c4a8cb9e1bb6e6cf2cd9d359863da7 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Sun, 14 May 2023 20:15:09 +0000 Subject: [PATCH] power_insn: fix verbose assembly extra info --- src/openpower/decoder/power_insn.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 0a2a13c1..7d779ca8 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1295,12 +1295,12 @@ class ExtendableOperand(DynamicOperand): yield f"{indent}{indent}{int(value):0{value.bits}b}" yield f"{indent}{indent}{', '.join(span)}" if isinstance(insn, SVP64Instruction): - extra_idx = self.extra_idx - if self.record.etype is _SVEType.NONE: - yield f"{indent}{indent}extra[none]" - else: - etype = repr(self.record.etype).lower() - yield f"{indent}{indent}{etype}{extra_idx!r}" + for extra_idx in frozenset(self.extra_idx): + if self.record.etype is _SVEType.NONE: + yield f"{indent}{indent}extra[none]" + else: + etype = repr(self.record.etype).lower() + yield f"{indent}{indent}{etype}{extra_idx!r}" else: vector = "*" if vector else "" yield f"{vector}{prefix}{int(value)}" -- 2.30.2