From c06a92033dde0b7224ee81d9b6d588509e560d94 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 16 Nov 2020 01:57:52 +0000 Subject: [PATCH] --- openpower/sv/16_bit_compressed.mdwn | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn index d02285e35..2d71a9674 100644 --- a/openpower/sv/16_bit_compressed.mdwn +++ b/openpower/sv/16_bit_compressed.mdwn @@ -89,17 +89,18 @@ The Compressed Major Opcode is in bits 5-7. only available in 16-bit mode, and only available when M=1 and N=1 - | 0 | 1 | 2 3 4 | | 567 | 89a | b c | d | e | f | - | 1 | o2 | RT | | 010 | RB | offs | 1 | addi. - | 1 | o2 | RT | | 011 | RB | offs | 1 | addis. - | 1 | o2 | 0 | | 100 | RB | offs | 1 | cmpdi - | 1 | o2 | 1 | | 100 | RB | offs | 1 | cmpwi - | 1 | o2 | X | | 101 | RA | offs | 1 | ldi - | 1 | o2 | X | | 110 | RA | offs | 1 | sti + | 0 | 1 | 2 3 4 | | 567 | 89a | b c | d | e | f | + | 1 | o2 | RT | | 010 | RB|0 | offs | 1 | addi. + | 1 | o2 | RT | | 011 | RB|0 | offs | 1 | addis. + | 1 | o2 | 0 | | 100 | RB | offs | 1 | cmpdi + | 1 | o2 | 1 | | 100 | RB | offs | 1 | cmpwi + | 1 | o2 | X | | 101 | RA | offs | 1 | ldi + | 1 | o2 | X | | 110 | RA | offs | 1 | sti * Note that bc is included (below) * immediate is constructed from offs (LSBs) and o2 (MSB) * X=0 is 32 bit (lwi), X=1 is 64 bit (ldi). offset is aligned. +* RB|0 if RB is zero, addi. becomes "li" ### Branch -- 2.30.2