From c0c163be7c604563796ce850022371fe57b76e14 Mon Sep 17 00:00:00 2001 From: Konstantinos Margaritis Date: Tue, 26 Jul 2022 13:57:46 +0000 Subject: [PATCH] fix form and pseudo-code for fmvis, tests in 64-bit mode --- openpower/isa/av.mdwn | 6 ++++-- src/openpower/test/alu/fmvis_cases.py | 8 ++++---- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/openpower/isa/av.mdwn b/openpower/isa/av.mdwn index 6d26841c..7a035168 100644 --- a/openpower/isa/av.mdwn +++ b/openpower/isa/av.mdwn @@ -208,13 +208,15 @@ Special Registers Altered: # Load Floating-Point Immediate -X-Form +DX-Form * fmvis FRS,SI Pseudo-code: - FRS <- EXTS(SI) + bf16 <- d0 || d1 || d2 + fp32 <- bf16 || [0]*16 + FRS <- Single_to_Double(fp32) Special Registers Altered: diff --git a/src/openpower/test/alu/fmvis_cases.py b/src/openpower/test/alu/fmvis_cases.py index 26d9692b..fc3e56fc 100644 --- a/src/openpower/test/alu/fmvis_cases.py +++ b/src/openpower/test/alu/fmvis_cases.py @@ -19,8 +19,8 @@ class FMVISTestCase(TestAccumulatorBase): ]) lst = list(lst) - expected_fprs = [0] * 32 - expected_fprs[5] = 0x40000000 - expected_fprs[6] = 0x21220000 - expected_fprs[7] = 0x3E800000 + expected_fprs = [0] * 64 + expected_fprs[5] = 0x4000000000000000 + expected_fprs[6] = 0x2122000000000000 + expected_fprs[7] = 0x3E80000000000000 self.add_case(Program(lst, bigendian), expected_fprs) -- 2.30.2