From c10332bbb8889d733bdaa729ef23cbd90176b55d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 6 Aug 2014 23:58:10 +0200 Subject: [PATCH] gallium: remove PIPE_SHADER_CAP_MAX_ADDRS This limit is fixed in Mesa core and cannot be changed. It only affects ARB_vertex_program and ARB_fragment_program. The minimum value for ARB_vertex_program is 1 according to the spec. The maximum value for ARB_vertex_program is limited to 1 by Mesa core. The value should be zero for ARB_fragment_program, because it doesn't support ARL. Finally, drivers shouldn't mess with these values arbitrarily. Reviewed-by: Ilia Mirkin --- src/gallium/auxiliary/gallivm/lp_bld_limits.h | 2 -- src/gallium/auxiliary/tgsi/tgsi_exec.h | 3 --- src/gallium/auxiliary/util/u_caps.c | 2 -- src/gallium/docs/source/screen.rst | 1 - src/gallium/drivers/freedreno/freedreno_screen.c | 2 -- src/gallium/drivers/i915/i915_screen.c | 2 -- src/gallium/drivers/ilo/ilo_screen.c | 2 -- src/gallium/drivers/nouveau/nv30/nv30_screen.c | 4 ---- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 -- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 -- src/gallium/drivers/r300/r300_screen.c | 3 --- src/gallium/drivers/r600/r600_pipe.c | 3 --- src/gallium/drivers/radeonsi/si_pipe.c | 3 --- src/gallium/drivers/svga/svga_screen.c | 3 --- src/gallium/include/pipe/p_defines.h | 1 - src/mesa/state_tracker/st_extensions.c | 3 +-- 16 files changed, 1 insertion(+), 37 deletions(-) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h index eb83ea88516..a96ab2924d2 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h @@ -103,8 +103,6 @@ gallivm_get_shader_param(enum pipe_shader_cap param) return PIPE_MAX_CONSTANT_BUFFERS; case PIPE_SHADER_CAP_MAX_TEMPS: return LP_MAX_TGSI_TEMPS; - case PIPE_SHADER_CAP_MAX_ADDRS: - return LP_MAX_TGSI_ADDRS; case PIPE_SHADER_CAP_MAX_PREDS: return LP_MAX_TGSI_PREDS; case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h b/src/gallium/auxiliary/tgsi/tgsi_exec.h index c6fd3d7d112..4720ec673cf 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.h +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h @@ -193,7 +193,6 @@ struct tgsi_sampler #define TGSI_EXEC_NUM_TEMP_R 4 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8) -#define TGSI_EXEC_NUM_ADDRS 1 /* predicate register */ #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9) @@ -433,8 +432,6 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param) return PIPE_MAX_CONSTANT_BUFFERS; case PIPE_SHADER_CAP_MAX_TEMPS: return TGSI_EXEC_NUM_TEMPS; - case PIPE_SHADER_CAP_MAX_ADDRS: - return TGSI_EXEC_NUM_ADDRS; case PIPE_SHADER_CAP_MAX_PREDS: return TGSI_EXEC_NUM_PREDS; case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: diff --git a/src/gallium/auxiliary/util/u_caps.c b/src/gallium/auxiliary/util/u_caps.c index ec8938b374d..cd005d68b3e 100644 --- a/src/gallium/auxiliary/util/u_caps.c +++ b/src/gallium/auxiliary/util/u_caps.c @@ -197,13 +197,11 @@ static unsigned caps_sm3[] = { UTIL_CHECK_SHADER(FRAGMENT, MAX_INSTRUCTIONS, 512), UTIL_CHECK_SHADER(FRAGMENT, MAX_INPUTS, 10), UTIL_CHECK_SHADER(FRAGMENT, MAX_TEMPS, 32), - UTIL_CHECK_SHADER(FRAGMENT, MAX_ADDRS, 1), UTIL_CHECK_SHADER(FRAGMENT, MAX_CONST_BUFFER_SIZE, 224 * 16), UTIL_CHECK_SHADER(VERTEX, MAX_INSTRUCTIONS, 512), UTIL_CHECK_SHADER(VERTEX, MAX_INPUTS, 16), UTIL_CHECK_SHADER(VERTEX, MAX_TEMPS, 32), - UTIL_CHECK_SHADER(VERTEX, MAX_ADDRS, 2), UTIL_CHECK_SHADER(VERTEX, MAX_CONST_BUFFER_SIZE, 256 * 16), UTIL_CHECK_TERMINATE diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 74cecc23b0e..814e3aec69b 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -269,7 +269,6 @@ file is still supported. In that case, the constbuf index is assumed to be 0. * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers. -* ``PIPE_SHADER_CAP_MAX_ADDRS``: The maximum number of address registers. * ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers. * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported. * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index 8fae5dddaba..5fb73525e13 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -327,8 +327,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, return 16; case PIPE_SHADER_CAP_MAX_TEMPS: return 64; /* Max native temporaries. */ - case PIPE_SHADER_CAP_MAX_ADDRS: - return 1; /* Max native address registers */ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: return ((screen->gpu_id >= 300) ? 1024 : 64) * sizeof(float[4]); case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 133c773a0be..ca3dd4a6f72 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -135,8 +135,6 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha return 1; case PIPE_SHADER_CAP_MAX_TEMPS: return 12; /* XXX: 12 -> 32 ? */ - case PIPE_SHADER_CAP_MAX_ADDRS: - return 0; case PIPE_SHADER_CAP_MAX_PREDS: return 0; case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: diff --git a/src/gallium/drivers/ilo/ilo_screen.c b/src/gallium/drivers/ilo/ilo_screen.c index fde4cc4f34c..bd6d8ddb4e7 100644 --- a/src/gallium/drivers/ilo/ilo_screen.c +++ b/src/gallium/drivers/ilo/ilo_screen.c @@ -122,8 +122,6 @@ ilo_get_shader_param(struct pipe_screen *screen, unsigned shader, return ILO_MAX_CONST_BUFFERS; case PIPE_SHADER_CAP_MAX_TEMPS: return 256; - case PIPE_SHADER_CAP_MAX_ADDRS: - return (shader == PIPE_SHADER_FRAGMENT) ? 0 : 1; case PIPE_SHADER_CAP_MAX_PREDS: return 0; case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c index 4fa34e372f7..2860188961a 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -207,8 +207,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return 0; - case PIPE_SHADER_CAP_MAX_ADDRS: - return 2; case PIPE_SHADER_CAP_MAX_PREDS: case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: @@ -241,8 +239,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, return 1; case PIPE_SHADER_CAP_MAX_TEMPS: return 32; - case PIPE_SHADER_CAP_MAX_ADDRS: - return (eng3d->oclass >= NV40_3D_CLASS) ? 1 : 0; case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return 16; diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 677f688f445..7b1b1125178 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -236,8 +236,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, return 65536; case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: return NV50_MAX_PIPE_CONSTBUFS; - case PIPE_SHADER_CAP_MAX_ADDRS: - return 1; case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: return shader != PIPE_SHADER_FRAGMENT; diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 24aee6b5ab7..686da329869 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -244,8 +244,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, if (shader == PIPE_SHADER_COMPUTE && class_3d >= NVE4_3D_CLASS) return NVE4_MAX_PIPE_CONSTBUFS_COMPUTE; return NVC0_MAX_PIPE_CONSTBUFS; - case PIPE_SHADER_CAP_MAX_ADDRS: - return 1; case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: return shader != PIPE_SHADER_FRAGMENT; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 1c5f43f4dc0..4e46f77ee02 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -252,7 +252,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return r300screen->caps.num_tex_units; - case PIPE_SHADER_CAP_MAX_ADDRS: case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: @@ -296,8 +295,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e return 1; case PIPE_SHADER_CAP_MAX_TEMPS: return 32; - case PIPE_SHADER_CAP_MAX_ADDRS: - return 1; /* XXX guessed */ case PIPE_SHADER_CAP_MAX_PREDS: return is_r500 ? 4 : 0; /* XXX guessed. */ case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index a08e70e9c91..f0a71c3027d 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -417,9 +417,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e return shader == PIPE_SHADER_VERTEX ? 16 : 32; case PIPE_SHADER_CAP_MAX_TEMPS: return 256; /* Max native temporaries. */ - case PIPE_SHADER_CAP_MAX_ADDRS: - /* XXX Isn't this equal to TEMPS? */ - return 1; /* Max native address registers */ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: return R600_MAX_CONST_BUFFER_SIZE; case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 85b57f4b3bd..592069746d9 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -348,9 +348,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32; case PIPE_SHADER_CAP_MAX_TEMPS: return 256; /* Max native temporaries. */ - case PIPE_SHADER_CAP_MAX_ADDRS: - /* FIXME Isn't this equal to TEMPS? */ - return 1; /* Max native address registers */ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: return 4096 * sizeof(float[4]); /* actually only memory limits this */ case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index 9326c777526..2fcc75c45bc 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -321,7 +321,6 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result)) return 32; return MIN2(result.u, SVGA3D_TEMPREG_MAX); - case PIPE_SHADER_CAP_MAX_ADDRS: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: /* * Although PS 3.0 has some addressing abilities it can only represent @@ -379,8 +378,6 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result)) return 32; return MIN2(result.u, SVGA3D_TEMPREG_MAX); - case PIPE_SHADER_CAP_MAX_ADDRS: - return 1; case PIPE_SHADER_CAP_MAX_PREDS: return 1; case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index 2caacc4e635..7a10d9833f3 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -607,7 +607,6 @@ enum pipe_shader_cap PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE, PIPE_SHADER_CAP_MAX_CONST_BUFFERS, PIPE_SHADER_CAP_MAX_TEMPS, - PIPE_SHADER_CAP_MAX_ADDRS, PIPE_SHADER_CAP_MAX_PREDS, /* boolean caps */ PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED, diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 2d7b147969a..a530c8597e4 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -187,8 +187,7 @@ void st_init_limits(struct pipe_screen *screen, pc->MaxTemps = pc->MaxNativeTemps = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_TEMPS); pc->MaxAddressRegs = pc->MaxNativeAddressRegs = - _min(screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_ADDRS), - MAX_PROGRAM_ADDRESS_REGS); + sh == PIPE_SHADER_VERTEX ? 1 : 0; pc->MaxParameters = pc->MaxNativeParameters = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) / sizeof(float[4]); -- 2.30.2