From c1464d6ae5dccc6c3f05f764351f7aeda9a7e6cb Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 22 Oct 2021 12:51:07 +0100 Subject: [PATCH] --- 3d_gpu/architecture/dynamic_simd/slice.mdwn | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/3d_gpu/architecture/dynamic_simd/slice.mdwn b/3d_gpu/architecture/dynamic_simd/slice.mdwn index bad7416d6..1c1f40e0e 100644 --- a/3d_gpu/architecture/dynamic_simd/slice.mdwn +++ b/3d_gpu/architecture/dynamic_simd/slice.mdwn @@ -134,6 +134,11 @@ SimdSignal that requires (and propagates) fixed element widths. All other sub-modules have up until this point been a fixed *overall* width where the element widths adapt to completely fill the entire underlying Signal. +(**This includes for [[dynamic_simd/eq]] and other comparators and the +[[dynamic_simd/logicops]] which very deliberately propagate the LSB boolean +value in each partition throughout the entire partition on a per-element +basis in order to make Mux and Switch function correctly**) + Given that this new width context is then passed through to other SimdSignals, the entire SimdSignal suite has to adapt to this change in requirements. It is however not as big an adaptation as it first seems, because ultimately -- 2.30.2