From c14c7d918d07fbe529328e7be615d16be9aea140 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 19 Jun 2020 15:30:45 +0100 Subject: [PATCH] add test_0_moduw and correct name to trunc_rem --- src/soc/decoder/pseudo/parser.py | 2 +- src/soc/simulator/test_div_sim.py | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/soc/decoder/pseudo/parser.py b/src/soc/decoder/pseudo/parser.py index 6446a2df..8bdcd868 100644 --- a/src/soc/decoder/pseudo/parser.py +++ b/src/soc/decoder/pseudo/parser.py @@ -619,7 +619,7 @@ class PowerParser: if p[2] == '/': fn = 'trunc_div' else: - fn = 'trunc_mod' + fn = 'trunc_rem' # return "function trunc_xxx(l, r)" p[0] = ast.Call(ast.Name(fn, ast.Load()), (l, r), []) else: diff --git a/src/soc/simulator/test_div_sim.py b/src/soc/simulator/test_div_sim.py index b84a10c6..2129de33 100644 --- a/src/soc/simulator/test_div_sim.py +++ b/src/soc/simulator/test_div_sim.py @@ -32,6 +32,14 @@ class DivTestCases(FHDLTestCase): with Program(lst) as program: self.run_tst_program(program, [1, 2, 3]) + def test_0_moduw(self): + lst = ["addi 1, 0, 0x5678", + "addi 2, 0, 0x1234", + "moduw 3, 1, 2", + ] + with Program(lst) as program: + self.run_tst_program(program, [1, 2, 3]) + def run_tst_program(self, prog, initial_regs=None, initial_sprs=None, initial_mem=None): initial_regs = [0] * 32 -- 2.30.2