From c183b8ca406a4b896042ea8c8c0256ea10c9dbae Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 17 Jan 2022 17:49:57 +0000 Subject: [PATCH] add a couple of trap pipeline unit tests these are based on linux-5.7 to make microwatt compatibility with hrfid and mtmsrd work --- src/openpower/test/trap/trap_cases.py | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/openpower/test/trap/trap_cases.py b/src/openpower/test/trap/trap_cases.py index f527a7e9..aeb0d05b 100644 --- a/src/openpower/test/trap/trap_cases.py +++ b/src/openpower/test/trap/trap_cases.py @@ -24,6 +24,15 @@ class TrapTestCase(TestAccumulatorBase): self.add_case(Program(lst, bigendian), initial_regs, initial_sprs) + def case_2_rfid(self): + lst = ["rfid"] + initial_regs = [0] * 32 + initial_regs[1] = 1 + initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0xb000000000001033} + self.add_case(Program(lst, bigendian), + initial_regs, initial_sprs, + initial_msr=0xa000000000000003) + def case_0_trap_eq_imm(self): insns = ["twi", "tdi"] for i in range(2): @@ -55,6 +64,13 @@ class TrapTestCase(TestAccumulatorBase): initial_regs[1] = 0xffffffffffffffff self.add_case(Program(lst, bigendian), initial_regs) + def case_4_mtmsrd_0_linux(self): + lst = ["mtmsrd 1,0"] + initial_regs = [0] * 32 + initial_regs[1] = 0xb000000000001033 + self.add_case(Program(lst, bigendian), initial_regs, + initial_msr=0xa000000000000003) + def case_4_mtmsrd_0(self): lst = ["mtmsrd 1,0"] initial_regs = [0] * 32 -- 2.30.2