From c28fcc601cfb584dbcf800a53f5d68d6766e50b3 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Sat, 18 Feb 2017 14:14:43 +0100 Subject: [PATCH] =?utf8?q?re=20PR=20target/79569=20(Unrecognized=20command?= =?utf8?q?=20line=20option=20=E2=80=98-m3dnowa=E2=80=99)?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit PR target/79569 * config/i386/i386.opt (m3dnowa): Replace Undocumented with Report. * common/config/i386/i386-common.c (OPTION_MASK_ISA_3DNOW_A_SET): Define. (ix86_handle_option): Handle OPT_m3dnowa. * doc/invoke.texi (-m3dnowa): Document. * doc/extend.texi (__builtin_ia32_pmulhuw, __builtin_ia32_pf2iw): Use -m3dnowa instead of -m3dnow -march=athlon. * gcc.target/i386/3dnowA-3.c: New test. From-SVN: r245561 --- gcc/ChangeLog | 8 ++++++++ gcc/common/config/i386/i386-common.c | 14 +++++++++++++- gcc/config/i386/i386.opt | 2 +- gcc/doc/extend.texi | 10 ++++------ gcc/doc/invoke.texi | 11 +++++++---- gcc/testsuite/ChangeLog | 3 +++ gcc/testsuite/gcc.target/i386/3dnowA-3.c | 10 ++++++++++ 7 files changed, 46 insertions(+), 12 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/3dnowA-3.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 90e6d1f0ae5..69db3df49d0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2017-02-18 Jakub Jelinek + PR target/79569 + * config/i386/i386.opt (m3dnowa): Replace Undocumented with Report. + * common/config/i386/i386-common.c (OPTION_MASK_ISA_3DNOW_A_SET): Define. + (ix86_handle_option): Handle OPT_m3dnowa. + * doc/invoke.texi (-m3dnowa): Document. + * doc/extend.texi (__builtin_ia32_pmulhuw, __builtin_ia32_pf2iw): Use + -m3dnowa instead of -m3dnow -march=athlon. + PR target/79559 * config/i386/i386.c (ix86_print_operand): Use output_operand_lossage instead of gcc_assert for K, r and R code checks. Formatting fixes. diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 8284a311d25..4185176495a 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -35,6 +35,8 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX #define OPTION_MASK_ISA_3DNOW_SET \ (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET) +#define OPTION_MASK_ISA_3DNOW_A_SET \ + (OPTION_MASK_ISA_3DNOW_A | OPTION_MASK_ISA_3DNOW_SET) #define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE #define OPTION_MASK_ISA_SSE2_SET \ @@ -293,7 +295,17 @@ ix86_handle_option (struct gcc_options *opts, return true; case OPT_m3dnowa: - return false; + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_A_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_A_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_3DNOW_A_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_A_UNSET; + } + return true; case OPT_msse: if (value) diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index b3b961cc3ca..71100d98708 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -614,7 +614,7 @@ Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save Support 3DNow! built-in functions. m3dnowa -Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save +Target Report Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save Support Athlon 3Dnow! built-in functions. msse diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 3d1546abdd5..143a7b7eb61 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -19513,9 +19513,8 @@ v2si __builtin_ia32_psradi (v2si, int) @end smallexample The following built-in functions are made available either with -@option{-msse}, or with a combination of @option{-m3dnow} and -@option{-march=athlon}. All of them generate the machine -instruction that is part of the name. +@option{-msse}, or with @option{-m3dnowa}. All of them generate +the machine instruction that is part of the name. @smallexample v4hi __builtin_ia32_pmulhuw (v4hi, v4hi) @@ -20615,9 +20614,8 @@ v2sf __builtin_ia32_pi2fd (v2si) v4hi __builtin_ia32_pmulhrw (v4hi, v4hi) @end smallexample -The following built-in functions are available when both @option{-m3dnow} -and @option{-march=athlon} are used. All of them generate the machine -instruction that is part of the name. +The following built-in functions are available when @option{-m3dnowa} is used. +All of them generate the machine instruction that is part of the name. @smallexample v2si __builtin_ia32_pf2iw (v2sf) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 72038a1ada0..31d10958560 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1188,9 +1188,9 @@ See RS/6000 and PowerPC Options. -mavx512bw -mavx512dq -mavx512ifma -mavx512vbmi -msha -maes @gol -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol --msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol --mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mmwaitx @gol --mclzero -mpku -mthreads @gol +-msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol +-mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol +-mmwaitx -mclzero -mpku -mthreads @gol -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol @@ -24998,6 +24998,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @itemx -m3dnow @opindex m3dnow @need 200 +@itemx -m3dnowa +@opindex m3dnowa +@need 200 @itemx -mpopcnt @opindex mpopcnt @need 200 @@ -25047,7 +25050,7 @@ These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA AVX512VBMI, BMI, BMI2, FXSR, -XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU or 3DNow!@: +XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, 3DNow!@: or enhanced 3DNow!@: extended instruction sets. Each has a corresponding @option{-mno-} option to disable use of these instructions. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b4edfe81361..6f741582a70 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,8 @@ 2017-02-18 Jakub Jelinek + PR target/79569 + * gcc.target/i386/3dnowA-3.c: New test. + PR target/79559 * gcc.target/i386/pr79559.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/3dnowA-3.c b/gcc/testsuite/gcc.target/i386/3dnowA-3.c new file mode 100644 index 00000000000..7cd57af6a59 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/3dnowA-3.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnowa" } */ + +#include + +__m64 +foo (__m64 x, __m64 y) +{ + return _m_pfnacc (x, y); +} -- 2.30.2