From c2cfb82075f725b3930a715bc84edc40a347c507 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 14 May 2019 10:02:18 +0100 Subject: [PATCH] experimenting with score6600 --- src/experiment/score6600.py | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py index 5415ae9e..6c75092a 100644 --- a/src/experiment/score6600.py +++ b/src/experiment/score6600.py @@ -122,8 +122,8 @@ class FunctionUnits(Elaboratable): m.d.comb += self.g_int_rd_pend_o.eq(intregdeps.rd_pend_o) m.d.comb += self.g_int_wr_pend_o.eq(intregdeps.wr_pend_o) - m.d.sync += intfudeps.rd_pend_i.eq(self.g_int_rd_pend_o) - m.d.sync += intfudeps.wr_pend_i.eq(self.g_int_wr_pend_o) + m.d.comb += intfudeps.rd_pend_i.eq(self.g_int_rd_pend_o) + m.d.comb += intfudeps.wr_pend_i.eq(self.g_int_wr_pend_o) m.d.comb += intfudeps.issue_i.eq(self.fn_issue_i) m.d.comb += intfudeps.go_rd_i.eq(self.go_rd_i) @@ -359,6 +359,8 @@ def scoreboard_sim(dut, alusim): yield dut.intregs.regs[i].reg.eq(i*2) alusim.setval(i, i*2) + yield + if False: yield from int_instr(dut, alusim, IADD, 4, 3, 5) yield from print_reg(dut, [3,4,5]) @@ -388,9 +390,9 @@ def scoreboard_sim(dut, alusim): break if dest not in [src1, src2]: break - #src1 = 7 - #src2 = 4 - #dest = 2 + src1 = 1 + src2 = 1 + dest = 2 op = randint(0, 1) op = 0 -- 2.30.2