From c2e081030e5c6f96ea3eb9948e5c0d0d2ed79a3d Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 9 May 2012 11:44:27 -0400 Subject: [PATCH] radeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_const --- .../drivers/radeon/AMDGPUGenShaderPatterns.pl | 30 ------------------- src/gallium/drivers/radeon/Makefile | 3 -- src/gallium/drivers/radeon/Makefile.sources | 1 - .../drivers/radeon/R600ISelLowering.cpp | 14 ++++++++- .../drivers/radeon/R600Instructions.td | 10 +++++-- 5 files changed, 20 insertions(+), 38 deletions(-) delete mode 100644 src/gallium/drivers/radeon/AMDGPUGenShaderPatterns.pl diff --git a/src/gallium/drivers/radeon/AMDGPUGenShaderPatterns.pl b/src/gallium/drivers/radeon/AMDGPUGenShaderPatterns.pl deleted file mode 100644 index 60523a7b48f..00000000000 --- a/src/gallium/drivers/radeon/AMDGPUGenShaderPatterns.pl +++ /dev/null @@ -1,30 +0,0 @@ -#===-- AMDGPUGenShaderPatterns.pl - TODO: Add brief description -------===# -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -#===----------------------------------------------------------------------===# -# -# TODO: Add full description -# -#===----------------------------------------------------------------------===# - -use strict; -use warnings; - -use AMDGPUConstants; - -my $reg_prefix = $ARGV[0]; - -for (my $i = 0; $i < CONST_REG_COUNT * 4; $i++) { - my $index = get_hw_index($i); - my $chan = get_chan_str($i); -print <; -STRING -} diff --git a/src/gallium/drivers/radeon/Makefile b/src/gallium/drivers/radeon/Makefile index 13aa3605dcd..cc409645a6e 100644 --- a/src/gallium/drivers/radeon/Makefile +++ b/src/gallium/drivers/radeon/Makefile @@ -35,9 +35,6 @@ else cp R600IntrinsicsOpenCL.td R600Intrinsics.td endif -R600ShaderPatterns.td: AMDGPUGenShaderPatterns.pl - $(PERL) $^ C > $@ - R600RegisterInfo.td: R600GenRegisterInfo.pl $(PERL) $^ > $@ diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index ae63dfa2461..8c302e160d4 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -1,7 +1,6 @@ GENERATED_SOURCES := \ R600Intrinsics.td \ - R600ShaderPatterns.td \ R600RegisterInfo.td \ AMDGPUInstrEnums.td \ SIRegisterInfo.td \ diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index bee59cc0d7b..52e2bd8d3f3 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -40,6 +40,7 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( { MachineFunction * MF = BB->getParent(); MachineRegisterInfo &MRI = MF->getRegInfo(); + MachineBasicBlock::iterator I = *MI; switch (MI->getOpcode()) { default: return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB); @@ -89,6 +90,18 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( case AMDIL::LOCAL_SIZE_Z: lowerImplicitParameter(MI, *BB, MRI, 8); break; + + case AMDIL::R600_LOAD_CONST: + { + int64_t RegIndex = MI->getOperand(1).getImm(); + unsigned ConstantReg = AMDIL::R600_CReg32RegClass.getRegister(RegIndex); + BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::COPY)) + .addOperand(MI->getOperand(0)) + .addReg(ConstantReg); + MI->eraseFromParent(); + break; + } + case AMDIL::LOAD_INPUT: { int64_t RegIndex = MI->getOperand(1).getImm(); @@ -99,7 +112,6 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( } case AMDIL::STORE_OUTPUT: { - MachineBasicBlock::iterator I = *MI; int64_t OutputIndex = MI->getOperand(1).getImm(); unsigned OutputReg = AMDIL::R600_TReg32RegClass.getRegister(OutputIndex); diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index fce5f90b66f..e3ed7c2d46a 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -991,6 +991,13 @@ def LOCAL_SIZE_Y : R600PreloadInst <"LOCAL_SIZE_Y", def LOCAL_SIZE_Z : R600PreloadInst <"LOCAL_SIZE_Z", int_r600_read_local_size_z>; +def R600_LOAD_CONST : AMDGPUShaderInst < + (outs R600_Reg32:$dst), + (ins i32imm:$src0), + "R600_LOAD_CONST $dst, $src0", + [(set R600_Reg32:$dst, (int_AMDGPU_load_const imm:$src0))] +>; + def LOAD_INPUT : AMDGPUShaderInst < (outs R600_Reg32:$dst), (ins i32imm:$src), @@ -1050,7 +1057,4 @@ def : Insert_Element ; def : Insert_Element ; def : Insert_Element ; - -include "R600ShaderPatterns.td" - } // End isR600toCayman Predicate -- 2.30.2