From c2eae4aec22df101b0bfa19e66f37573b5caf762 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 16 May 2020 22:52:58 +0100 Subject: [PATCH] add arithmetic and logical operand tables --- 3d_gpu/architecture/pipeline_operands.mdwn | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/3d_gpu/architecture/pipeline_operands.mdwn b/3d_gpu/architecture/pipeline_operands.mdwn index 404e6feaa..21d47cd61 100644 --- a/3d_gpu/architecture/pipeline_operands.mdwn +++ b/3d_gpu/architecture/pipeline_operands.mdwn @@ -67,3 +67,36 @@ Output: op_rfid NIA xx xx op_hrfid NIA xx xx ''' + +# Logical Register Pipeline + +Input: +''' + 64 - Port 1 64 - Port 2 1 - SO 1 - Carry + ----------- ----------- ------ --------- + RA/RS RB so carry_in +''' + +Output: +''' + 64 - Port 1 4 - Port 2 1 - SO 2 - Carry/Carry32 2 - OV/OV32 + ----------- ----------- ------ ----------------- ----------- + RC/RT CR0 so cr_o / cr32_o ov_o / ov32_o +''' + +# Arithmetic Register Pipeline + +Input: +''' + 64 - Port 1 64 - Port 2 1 - SO 1 - Carry + ----------- ----------- ------ --------- + RA RB/immed so carry_in +''' + +Output: +''' + 64 - Port 1 4 - Port 2 1 - SO 2 - Carry/Carry32 2 - OV/OV32 + ----------- ----------- ------ ----------------- ----------- + RC/RT CR0 so cr_o / cr32_o ov_o / ov32_o +''' + -- 2.30.2