From c2f4debb657306be09d3221456e6bb23d4bbd00b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 26 Jul 2022 16:28:13 +0100 Subject: [PATCH] bit more docs on fmvis --- src/openpower/test/alu/fmvis_cases.py | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/openpower/test/alu/fmvis_cases.py b/src/openpower/test/alu/fmvis_cases.py index fc3e56fc..f3f75530 100644 --- a/src/openpower/test/alu/fmvis_cases.py +++ b/src/openpower/test/alu/fmvis_cases.py @@ -13,14 +13,15 @@ import unittest class FMVISTestCase(TestAccumulatorBase): def case_0_fmvis(self): - lst = SVP64Asm(["fmvis 5, 0x4000", + lst = SVP64Asm(["fmvis 5, 0x4000", # 2.0 "fmvis 6, 0x2122", - "fmvis 7, 0x3E80", + "fmvis 7, 0x3E80", # 0.25 ]) lst = list(lst) expected_fprs = [0] * 64 - expected_fprs[5] = 0x4000000000000000 + expected_fprs[5] = 0x4000000000000000 # 2.0 in FP64 form expected_fprs[6] = 0x2122000000000000 - expected_fprs[7] = 0x3E80000000000000 - self.add_case(Program(lst, bigendian), expected_fprs) + expected_fprs[7] = 0x3FD0000000000000 # 0.25 in FP64 form + e = ExpectedState(pc=4) # TODO, add FPRs + self.add_case(Program(lst, bigendian, e)) -- 2.30.2