From c36a3ec6aa8f4168b4c2bc5998bc2327b02873f7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 13 May 2020 10:11:44 +0100 Subject: [PATCH] Re: [libre-riscv-dev] [OpenPOWER-HDL-Cores] little-endian only power cores and spec compliance --- d6/c7e949db5a5830349da1f80af5ae5b2399eb13 | 187 ++++++++++++++++++++++ 1 file changed, 187 insertions(+) create mode 100644 d6/c7e949db5a5830349da1f80af5ae5b2399eb13 diff --git a/d6/c7e949db5a5830349da1f80af5ae5b2399eb13 b/d6/c7e949db5a5830349da1f80af5ae5b2399eb13 new file mode 100644 index 0000000..3887cb0 --- /dev/null +++ b/d6/c7e949db5a5830349da1f80af5ae5b2399eb13 @@ -0,0 +1,187 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Wed, 13 May 2020 10:12:20 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jYnR5-0006ZW-NN; Wed, 13 May 2020 10:12:19 +0100 +Received: from lkcl.net ([217.147.94.29]) + by libre-soc.org with esmtps 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