From c384f7310b13f03aec54e845b998ebc7cc79ac73 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Tue, 25 Jun 2019 20:20:40 +0100
Subject: [PATCH]

---
 simple_v_extension/specification.mdwn | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index a4c7f8ebc..4d33a534c 100644
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -756,7 +756,11 @@ No specific hints are yet defined in Simple-V
 
 # Vector Block Format <a name="vliw-format"></a>
 
-See ancillary resource: [[vblock_format]]
+The VBLOCK Format allows Register, Predication and Vector Length to be contextually associated with a group of RISC-V scalar opcodes.  The format is as follows:
+
+[[!inline raw="yes" pages="simple_v_extension/vblock_format_table" ]]
+
+For more details, including the CSRs, see ancillary resource: [[vblock_format]]
 
 # Under consideration <a name="issues"></a>
 
-- 
2.30.2