From c38e2db399734b35d730214b18880cd0851d5360 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 2 May 2022 11:15:11 +0100 Subject: [PATCH] --- openpower/sv/svp64.mdwn | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index 8a591abb3..2734a7cf1 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -505,9 +505,9 @@ EXTRA is the means by which two things are achieved: The register files are therefore extended: -* INT is extended from r0-31 to 128 -* FP is extended from fp0-32 to 128 -* CR is extended from CR0-7 to CR0-127 +* INT is extended from r0-31 to r0-127 +* FP is extended from fp0-32 to fp0-fp127 +* CR Fields are extended from CR0-7 to CR0-127 In the following tables register numbers are constructed from the standard v3.0B / v3.1B 32 bit register field (RA, FRA) and the EXTRA2 -- 2.30.2