From c3d58b8d28db9e77cd2ecd6a279d8c305b8ee412 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 21 Mar 2018 06:29:44 +0000 Subject: [PATCH] make mux_interface a Pin/Interface... getting complicated --- src/interface_decl.py | 76 +++++++++++++++++++++++++++++++---------- src/interface_def.py | 2 +- src/pinmux_generator.py | 4 +-- 3 files changed, 61 insertions(+), 21 deletions(-) diff --git a/src/interface_decl.py b/src/interface_decl.py index 712fb29..2dd0a6c 100644 --- a/src/interface_decl.py +++ b/src/interface_decl.py @@ -10,14 +10,16 @@ class Pin(object): ready=True, enabled=True, io=False, - action=False): + action=False, + bitspec=None): self.name = name self.ready = ready self.enabled = enabled self.io = io self.action = action + self.bitspec = bitspec if bitspec else '1' - def ifacefmt(self): + def ifacefmt(self, fmtfn=None): res = ' ' status = [] if self.ready: @@ -33,27 +35,28 @@ class Pin(object): res += " method " if self.io: res += "\n " + name = fmtfn(self.name) if self.action: res += " Action " - res += self.name - res += ' (Bit#(1) in)' + res += name + res += ' (Bit#(%s) in)' % self.bitspec else: - res += " Bit#(1) " - res += self.name + res += " Bit#(%s) " % self.bitspec + res += name res += ";" return res - def ifacedef(self, fmtoutfn=None, fmtinfn=None): + def ifacedef(self, fmtoutfn=None, fmtinfn=None, fmtdecfn=None): res = ' method ' if self.action: - fmtname = fmtinfn(self.name) if fmtinfn else self.name + fmtname = fmtinfn(self.name) res += "Action " - res += self.name - res += '(Bit#(1) in);\n' + res += fmtdecfn(self.name) + res += '(Bit#(%s) in);\n' % self.bitspec res += ' %s<=in;\n' % fmtname res += ' endmethod' else: - fmtname = fmtoutfn(self.name) if fmtoutfn else self.name + fmtname = fmtoutfn(self.name) res += "%s=%s;" % (self.name, fmtname) return res @@ -77,8 +80,15 @@ class Interface(object): else: self.pins.append(Pin(**p)) - def ifacefmt(self, i): - return '\n'+'\n'.join(map(lambda x:x.ifacefmt(), self.pins)).format(i) + def ifacefmt(self, *args): + res = '\n'.join(map(self.ifacefmtdecpin, self.pins)).format(*args) + return '\n' + res + + def ifacefmtdecfn(self, name): + return name + + def ifacefmtdecfn2(self, name): + return name def ifacefmtoutfn(self, name): return name @@ -86,16 +96,34 @@ class Interface(object): def ifacefmtinfn(self, name): return "wr%s" % name + def ifacefmtdecpin(self, pin): + return pin.ifacefmt(self.ifacefmtdecfn) + def ifacefmtpin(self, pin): - return pin.ifacedef(self.ifacefmtoutfn, self.ifacefmtinfn) + return pin.ifacedef(self.ifacefmtoutfn, self.ifacefmtinfn, + self.ifacefmtdecfn2) - def ifacedef(self, i): - res = '\n'.join(map(self.ifacefmtpin, self.pins)).format(i) + def ifacedef(self, *args): + res = '\n'.join(map(self.ifacefmtpin, self.pins)).format(*args) return '\n' + res + '\n' +class MuxInterface(Interface): + + def ifacefmtdecfn2(self, name): + return "cell{0}_mux" + + def ifacefmtdecfn(self, name): + return "cell{0}_mux" + + def ifacefmtinfn(self, name): + return "wrmux{0}" + class IOInterface(Interface): + #def ifacefmtdecfn(self, name): + # return "cell{0}_mux" + def ifacefmtoutfn(self, name): return "cell{0}_out.%s" % (name[3:-4]) @@ -105,8 +133,9 @@ class IOInterface(Interface): # ========= Interface declarations ================ # -mux_interface = ''' - method Action cell{0}_mux(Bit#({1}) in);''' +mux_interface = MuxInterface([{'name': 'cell{0}', 'ready':False, + 'enabled':False, + 'bitspec': '{1}', 'action': True}]) io_interface = IOInterface([{'name': 'io_outputval_{0}', 'enabled': False}, {'name': 'io_output_en_{0}', 'enabled': False}, @@ -185,3 +214,14 @@ if __name__ == '__main__': from interface_def import io_interface_def print io_interface_def.format(0) print io_interface.ifacedef(0) + assert io_interface_def.format(0) == io_interface.ifacedef(0) + + mux_interfacetest = ''' + method Action cell{0}_mux(Bit#({1}) in);''' + print pinmunge(mux_interfacetest.format(0,1)) + print pinmunge(mux_interface.ifacefmt(0, 1)) + from interface_def import mux_interface_def + print repr(mux_interface_def.format(0, 1)) + print repr(mux_interface.ifacedef(0, 1)) + assert mux_interface_def.format(0,1) == mux_interface.ifacedef(0,1) + diff --git a/src/interface_def.py b/src/interface_def.py index 6c20397..e27ab68 100644 --- a/src/interface_def.py +++ b/src/interface_def.py @@ -1,6 +1,6 @@ # === templates for interface definitions ====== # mux_interface_def = ''' - method Action cell{0}_mux (Bit#({1}) in ); + method Action cell{0}_mux(Bit#({1}) in); wrmux{0}<=in; endmethod ''' diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index 64bb373..b496d22 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -78,7 +78,7 @@ with open("./bsv_src/pinmux.bsv", "w") as bsv_file: // where each IO will have the same number of muxes.''') for cell in muxed_cells: - bsv_file.write(mux_interface.format(cell[0], + bsv_file.write(mux_interface.ifacefmt(cell[0], int(math.log(len(cell) - 1, 2)))) bsv_file.write(''' @@ -203,7 +203,7 @@ with open("./bsv_src/pinmux.bsv", "w") as bsv_file: interface mux_lines = interface MuxSelectionLines ''') for cell in muxed_cells: - bsv_file.write(mux_interface_def.format(cell[0], + bsv_file.write(mux_interface.ifacedef(cell[0], int(math.log(len(cell) - 1, 2)))) bsv_file.write(''' endinterface; -- 2.30.2