From c4011867624808c4c51ae1d19dfd09fd1d455670 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Wed, 23 Oct 2019 16:24:46 -0700 Subject: [PATCH] intel: Track stencil aux usage on Gen12+ Enable stencil compression enable and control surface enable bit if stencil buffer lossless compression is enabled. v2: Remove unnecessary GEN_GEN check (Nanley Chery) v3: (Nanley Chery) - Change commit subject tag from intel/isl to intel - Keep assignment order correct Signed-off-by: Sagar Ghuge Reviewed-by: Nanley Chery --- src/gallium/drivers/iris/iris_state.c | 1 + src/intel/blorp/blorp_genX_exec.h | 1 + src/intel/isl/isl.h | 5 +++++ src/intel/isl/isl_emit_depth_stencil.c | 3 +++ 4 files changed, 10 insertions(+) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index e55ccc08b61..a53e76c004e 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -2993,6 +2993,7 @@ iris_set_framebuffer_state(struct pipe_context *ctx, if (stencil_res) { view.usage |= ISL_SURF_USAGE_STENCIL_BIT; + info.stencil_aux_usage = stencil_res->aux.usage; info.stencil_surf = &stencil_res->surf; info.stencil_address = stencil_res->bo->gtt_offset + stencil_res->offset; if (!zres) { diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index fd913315d0c..f7bdf6a2903 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1600,6 +1600,7 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch, if (params->stencil.enabled) { info.stencil_surf = ¶ms->stencil.surf; + info.stencil_aux_usage = params->stencil.aux_usage; struct blorp_address stencil_address = params->stencil.addr; #if GEN_GEN == 6 /* Sandy bridge hardware does not technically support mipmapped stencil. diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index bcb46b12266..017052d79be 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1445,6 +1445,11 @@ struct isl_depth_stencil_hiz_emit_info { * The depth clear value */ float depth_clear_value; + + /** + * Track stencil aux usage for Gen >= 12 + */ + enum isl_aux_usage stencil_aux_usage; }; extern const struct isl_format_layout isl_format_layouts[]; diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c index fc2cf68ed4c..4906d95a49c 100644 --- a/src/intel/isl/isl_emit_depth_stencil.c +++ b/src/intel/isl/isl_emit_depth_stencil.c @@ -146,6 +146,9 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch, sb.Depth = sb.RenderTargetViewExtent = info->view->array_len - 1; sb.SurfLOD = info->view->base_level; sb.MinimumArrayElement = info->view->base_array_layer; + sb.StencilCompressionEnable = + info->stencil_aux_usage == ISL_AUX_USAGE_CCS_E; + sb.ControlSurfaceEnable = sb.StencilCompressionEnable; #elif GEN_GEN >= 8 || GEN_IS_HASWELL sb.StencilBufferEnable = true; #endif -- 2.30.2