From c5903ed4541ec4f9389e33ba27c9527afa87ec44 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 4 Apr 2011 12:29:50 -0400 Subject: [PATCH] r600c: add support for llano Signed-off-by: Alex Deucher --- src/mesa/drivers/dri/r600/evergreen_blit.c | 44 +++++++++++++++++++ src/mesa/drivers/dri/r600/evergreen_chip.c | 4 +- src/mesa/drivers/dri/r600/evergreen_state.c | 16 +++++++ src/mesa/drivers/dri/radeon/radeon_chipset.h | 14 ++++++ .../dri/radeon/radeon_common_context.c | 2 + src/mesa/drivers/dri/radeon/radeon_screen.c | 19 ++++++++ 6 files changed, 98 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/r600/evergreen_blit.c b/src/mesa/drivers/dri/r600/evergreen_blit.c index 0e4da5499ba..95ac4aee5ce 100644 --- a/src/mesa/drivers/dri/r600/evergreen_blit.c +++ b/src/mesa/drivers/dri/r600/evergreen_blit.c @@ -1525,6 +1525,48 @@ eg_set_default_state(context_t *context) num_hs_stack_entries = 42; num_ls_stack_entries = 42; break; + case CHIP_FAMILY_SUMO: + num_ps_gprs = 93; + num_vs_gprs = 46; + num_temp_gprs = 4; + num_gs_gprs = 31; + num_es_gprs = 31; + num_hs_gprs = 23; + num_ls_gprs = 23; + num_ps_threads = 96; + num_vs_threads = 25; + num_gs_threads = 25; + num_es_threads = 25; + num_hs_threads = 25; + num_ls_threads = 25; + num_ps_stack_entries = 42; + num_vs_stack_entries = 42; + num_gs_stack_entries = 42; + num_es_stack_entries = 42; + num_hs_stack_entries = 42; + num_ls_stack_entries = 42; + break; + case CHIP_FAMILY_SUMO2: + num_ps_gprs = 93; + num_vs_gprs = 46; + num_temp_gprs = 4; + num_gs_gprs = 31; + num_es_gprs = 31; + num_hs_gprs = 23; + num_ls_gprs = 23; + num_ps_threads = 96; + num_vs_threads = 25; + num_gs_threads = 25; + num_es_threads = 25; + num_hs_threads = 25; + num_ls_threads = 25; + num_ps_stack_entries = 85; + num_vs_stack_entries = 85; + num_gs_stack_entries = 85; + num_es_stack_entries = 85; + num_hs_stack_entries = 85; + num_ls_stack_entries = 85; + break; case CHIP_FAMILY_BARTS: num_ps_gprs = 93; num_vs_gprs = 46; @@ -1592,6 +1634,8 @@ eg_set_default_state(context_t *context) if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CEDAR) || (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_PALM) || + (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_SUMO) || + (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_SUMO2) || (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CAICOS)) CLEARbit(sq_config, EG_SQ_CONFIG__VC_ENABLE_bit); else diff --git a/src/mesa/drivers/dri/r600/evergreen_chip.c b/src/mesa/drivers/dri/r600/evergreen_chip.c index 42566e537a5..388a96ff067 100644 --- a/src/mesa/drivers/dri/r600/evergreen_chip.c +++ b/src/mesa/drivers/dri/r600/evergreen_chip.c @@ -287,7 +287,9 @@ static void evergreenSetupVTXConstants(struct gl_context * ctx, return; if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CEDAR) || - (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_PALM)) + (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_PALM) || + (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_SUMO) || + (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_SUMO2)) r700SyncSurf(context, paos->bo, RADEON_GEM_DOMAIN_GTT, 0, TC_ACTION_ENA_bit); else r700SyncSurf(context, paos->bo, RADEON_GEM_DOMAIN_GTT, 0, VC_ACTION_ENA_bit); diff --git a/src/mesa/drivers/dri/r600/evergreen_state.c b/src/mesa/drivers/dri/r600/evergreen_state.c index 309c93fe088..81bf1172dc3 100644 --- a/src/mesa/drivers/dri/r600/evergreen_state.c +++ b/src/mesa/drivers/dri/r600/evergreen_state.c @@ -1470,6 +1470,22 @@ static void evergreenInitSQConfig(struct gl_context * ctx) uMaxThreads = 192; uMaxStackEntries = 256; break; + case CHIP_FAMILY_SUMO: + uSqNumCfInsts = 2; + bVC_ENABLE = GL_FALSE; + uMaxGPRs = 256; + uPSThreadCount = 96; + uMaxThreads = 248; + uMaxStackEntries = 256; + break; + case CHIP_FAMILY_SUMO2: + uSqNumCfInsts = 2; + bVC_ENABLE = GL_FALSE; + uMaxGPRs = 256; + uPSThreadCount = 96; + uMaxThreads = 248; + uMaxStackEntries = 512; + break; case CHIP_FAMILY_BARTS: uSqNumCfInsts = 2; bVC_ENABLE = GL_TRUE; diff --git a/src/mesa/drivers/dri/radeon/radeon_chipset.h b/src/mesa/drivers/dri/radeon/radeon_chipset.h index 9145023826e..bd236625122 100644 --- a/src/mesa/drivers/dri/radeon/radeon_chipset.h +++ b/src/mesa/drivers/dri/radeon/radeon_chipset.h @@ -450,6 +450,18 @@ #define PCI_CHIP_PALM_9806 0x9806 #define PCI_CHIP_PALM_9807 0x9807 +#define PCI_CHIP_SUMO_9640 0x9640 +#define PCI_CHIP_SUMO_9641 0x9641 +#define PCI_CHIP_SUMO2_9642 0x9642 +#define PCI_CHIP_SUMO2_9643 0x9643 +#define PCI_CHIP_SUMO2_9644 0x9644 +#define PCI_CHIP_SUMO2_9645 0x9645 +#define PCI_CHIP_SUMO_9647 0x9647 +#define PCI_CHIP_SUMO_9648 0x9648 +#define PCI_CHIP_SUMO_964A 0x964a +#define PCI_CHIP_SUMO_964E 0x964e +#define PCI_CHIP_SUMO_964F 0x964f + #define PCI_CHIP_BARTS_6720 0x6720 #define PCI_CHIP_BARTS_6721 0x6721 #define PCI_CHIP_BARTS_6722 0x6722 @@ -534,6 +546,8 @@ enum { CHIP_FAMILY_CYPRESS, CHIP_FAMILY_HEMLOCK, CHIP_FAMILY_PALM, + CHIP_FAMILY_SUMO, + CHIP_FAMILY_SUMO2, CHIP_FAMILY_BARTS, CHIP_FAMILY_TURKS, CHIP_FAMILY_CAICOS, diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 5d7b3973d57..bf8925f61d0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -98,6 +98,8 @@ static const char* get_chip_family_name(int chip_family) case CHIP_FAMILY_CYPRESS: return "CYPRESS"; case CHIP_FAMILY_HEMLOCK: return "HEMLOCK"; case CHIP_FAMILY_PALM: return "PALM"; + case CHIP_FAMILY_SUMO: return "SUMO"; + case CHIP_FAMILY_SUMO2: return "SUMO2"; case CHIP_FAMILY_BARTS: return "BARTS"; case CHIP_FAMILY_TURKS: return "TURKS"; case CHIP_FAMILY_CAICOS: return "CAICOS"; diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 6449229e088..6cf843406f9 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1168,6 +1168,25 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id) screen->chip_flags = RADEON_CHIPSET_TCL; break; + case PCI_CHIP_SUMO_9640: + case PCI_CHIP_SUMO_9641: + case PCI_CHIP_SUMO_9647: + case PCI_CHIP_SUMO_9648: + case PCI_CHIP_SUMO_964A: + case PCI_CHIP_SUMO_964E: + case PCI_CHIP_SUMO_964F: + screen->chip_family = CHIP_FAMILY_SUMO; + screen->chip_flags = RADEON_CHIPSET_TCL; + break; + + case PCI_CHIP_SUMO2_9642: + case PCI_CHIP_SUMO2_9643: + case PCI_CHIP_SUMO2_9644: + case PCI_CHIP_SUMO2_9645: + screen->chip_family = CHIP_FAMILY_SUMO2; + screen->chip_flags = RADEON_CHIPSET_TCL; + break; + case PCI_CHIP_BARTS_6720: case PCI_CHIP_BARTS_6721: case PCI_CHIP_BARTS_6722: -- 2.30.2