From c5b8771d63f45991cb796e90790477faa3ff66d8 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 25 Sep 2022 01:26:51 +0100 Subject: [PATCH] --- openpower/sv/overview/discussion.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn index dd673a7c2..f63980cb1 100644 --- a/openpower/sv/overview/discussion.mdwn +++ b/openpower/sv/overview/discussion.mdwn @@ -289,4 +289,6 @@ The reason why **GPR(3)** contains the value 0x200 (1<<9) when it was the 2nd Vector Element being written to is because of the sequential conceptual overlap between **all** registers, as ultimately the regfile must be considered arbitrarily-byte-addressable -just like any Memory. +just like any Memory, and therefore writing to +half-word element `e4` starting from **GPR(2)** actually wrote to +half-word element `e0` of GPR(3). -- 2.30.2