From c75798d099cbc8160835ca9ba55f8c5ddeae58f5 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 9 Oct 2018 17:31:31 +0100 Subject: [PATCH] add TODO notes --- simple_v_extension/specification.mdwn | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn index b9d0ec40a..e27a446c6 100644 --- a/simple_v_extension/specification.mdwn +++ b/simple_v_extension/specification.mdwn @@ -163,6 +163,8 @@ When setting this CSR, the following characteristics will be enforced: ## Register CSR key-value (CAM) table +TODO: update CSR tables, now 7-bit for regidx + The purpose of the Register CSR table is four-fold: * To mark integer and floating-point registers as requiring "redirection" @@ -229,6 +231,8 @@ is given in the section "Bitwidth Virtual Register Reordering". ## Predication CSR +TODO: update CSR tables, now 7-bit for regidx + The Predication CSR is a key-value store indicating whether, if a given destination register (integer or floating-point) is referred to in an instruction, it is to be predicated. Tt is particularly important to note @@ -505,6 +509,9 @@ Notes: Reordering") setting Vector-Length times (number of SIMD elements) bits in Predicate Register rd, as opposed to just Vector-Length bits. +TODO: predication now taken from src2. also branch goes ahead +if all compares are successful. + ### Floating-point Comparisons There does not exist floating-point branch operations, only compare. -- 2.30.2