From c914ac45c7670c710f3ec17dbd5341e55ae2380f Mon Sep 17 00:00:00 2001 From: Andreas Krebbel Date: Thu, 6 Aug 2015 10:21:41 +0000 Subject: [PATCH] S/390: Clobber VRs in __builtin_tbegin. gcc/ChangeLog: * config/s390/s390.c (s390_expand_tbegin): Expand either tbegin_1_z13 or tbegin_1 depending on VX flag. * config/s390/s390.md ("tbegin_1_z13"): New expander. gcc/testsuite/ChangeLog: * gcc.target/s390/htm-builtins-z13-1.c: New test. From-SVN: r226672 --- gcc/ChangeLog | 6 ++++ gcc/config/s390/s390.c | 9 ++++- gcc/config/s390/s390.md | 29 ++++++++++++++++ gcc/testsuite/ChangeLog | 4 +++ .../gcc.target/s390/htm-builtins-z13-1.c | 34 +++++++++++++++++++ 5 files changed, 81 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0c3b80ef859..357ea67b76e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-08-06 Andreas Krebbel + + * config/s390/s390.c (s390_expand_tbegin): Expand either + tbegin_1_z13 or tbegin_1 depending on VX flag. + * config/s390/s390.md ("tbegin_1_z13"): New expander. + 2015-08-06 Andreas Krebbel * config/s390/s390.opt: Clarify description for -mzvector diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 7f609baba7b..24a92908556 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -11623,7 +11623,14 @@ s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p) } if (clobber_fprs_p) - emit_insn (gen_tbegin_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), tdb)); + { + if (TARGET_VX) + emit_insn (gen_tbegin_1_z13 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), + tdb)); + else + emit_insn (gen_tbegin_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), + tdb)); + } else emit_insn (gen_tbegin_nofloat_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), tdb)); diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index b23973e4dd0..2be7653d713 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -10626,6 +10626,35 @@ DONE; }) +; Clobber VRs since they don't get restored +(define_insn "tbegin_1_z13" + [(set (reg:CCRAW CC_REGNUM) + (unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")] + UNSPECV_TBEGIN)) + (set (match_operand:BLK 1 "memory_operand" "=Q") + (unspec_volatile:BLK [(match_dup 0)] UNSPECV_TBEGIN_TDB)) + (clobber (reg:TI 16)) (clobber (reg:TI 38)) + (clobber (reg:TI 17)) (clobber (reg:TI 39)) + (clobber (reg:TI 18)) (clobber (reg:TI 40)) + (clobber (reg:TI 19)) (clobber (reg:TI 41)) + (clobber (reg:TI 20)) (clobber (reg:TI 42)) + (clobber (reg:TI 21)) (clobber (reg:TI 43)) + (clobber (reg:TI 22)) (clobber (reg:TI 44)) + (clobber (reg:TI 23)) (clobber (reg:TI 45)) + (clobber (reg:TI 24)) (clobber (reg:TI 46)) + (clobber (reg:TI 25)) (clobber (reg:TI 47)) + (clobber (reg:TI 26)) (clobber (reg:TI 48)) + (clobber (reg:TI 27)) (clobber (reg:TI 49)) + (clobber (reg:TI 28)) (clobber (reg:TI 50)) + (clobber (reg:TI 29)) (clobber (reg:TI 51)) + (clobber (reg:TI 30)) (clobber (reg:TI 52)) + (clobber (reg:TI 31)) (clobber (reg:TI 53))] +; CONST_OK_FOR_CONSTRAINT_P does not work with D constraint since D is +; not supposed to be used for immediates (see genpreds.c). + "TARGET_VX && INTVAL (operands[0]) >= 0 && INTVAL (operands[0]) <= 0xffff" + "tbegin\t%1,%x0" + [(set_attr "op_type" "SIL")]) + (define_insn "tbegin_1" [(set (reg:CCRAW CC_REGNUM) (unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dad3c512bb2..e087538b332 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-08-06 Andreas Krebbel + + * gcc.target/s390/htm-builtins-z13-1.c: New test. + 2015-08-06 Francois-Xavier Coudert PR fortran/64022 diff --git a/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c b/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c new file mode 100644 index 00000000000..7879c36aeab --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/htm-builtins-z13-1.c @@ -0,0 +1,34 @@ +/* Verify if VRs are saved and restored. */ + +/* { dg-do run } */ +/* { dg-require-effective-target vector } */ +/* { dg-options "-O3 -march=z13 -mzarch" } */ + +typedef int __attribute__((vector_size(16))) v4si; + +v4si __attribute__((noinline)) +foo (v4si a) +{ + a += (v4si){ 1, 1, 1, 1 }; + if (__builtin_tbegin (0) == 0) + { + a += (v4si){ 1, 1, 1, 1 }; + __builtin_tabort (256); + __builtin_tend (); + } + else + a -= (v4si){ 1, 1, 1, 1 }; + + return a; +} + +int +main () +{ + v4si a = (v4si){ 0, 0, 0, 0 }; + + a = foo (a); + + if (a[0] != 0) + __builtin_abort (); +} -- 2.30.2