From c92bfb1d816d671b77c5fe338c5f48e4a7152e4b Mon Sep 17 00:00:00 2001 From: Kajoljain379 Date: Wed, 10 Apr 2019 05:40:49 +0000 Subject: [PATCH] arch-power: Added dcbz instruction * Added dcbz cache instruction which used by kernel to clear multiple words at a time. Change-Id: I7cfd7c93cac2d4419db987e7cf8fef8b4c71f805 Signed-off-by: Kajoljain379 --- src/arch/power/isa/decoder.isa | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa index e72aae7fb..667a73223 100644 --- a/src/arch/power/isa/decoder.isa +++ b/src/arch/power/isa/decoder.isa @@ -966,6 +966,21 @@ decode PO default Unknown::unknown() { format MiscOp { 278: dcbt({{ }}); 246: dcbtst({{ }}); + + 1014: dcbz({{ + Request::Flags flags = Request::PHYSICAL; + Addr EA; + if(RA == 0) + EA = Rb & -128ULL; + else + EA = (Ra + Rb) & -128ULL; + Mem = 0; + for (int i = 0; i < 16; ++i) { + writeMemAtomic(xc, traceData, Mem,EA + i*8, + flags, NULL); + } + }}); + 86: dcbf({{ }}); 598: sync({{ }}, [ IsMemBarrier ]); 854: eieio({{ }}, [ IsMemBarrier ]); -- 2.30.2