From c953fb88feaff23f5ffb7caf2f906f08d2d79550 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Fri, 3 Mar 2017 17:19:34 +0100 Subject: [PATCH] i386.md (*pushtf): Change *roF constraint to *roC. * config/i386/i386.md (*pushtf): Change *roF constraint to *roC. (*pushxf): Limit oF constraint to 32bit targets and add oC constraint for 64bit targets. (pushxf splitter): Use PUSH_ROUNDING to calculate stack adjustment. (*pushdf): Change rmF constraint to rmC. From-SVN: r245876 --- gcc/ChangeLog | 8 ++++++++ gcc/config/i386/i386.md | 17 +++++++++-------- 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4de017dcd07..096d23f4ca9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2017-03-03 Uros Bizjak + + * config/i386/i386.md (*pushtf): Change *roF constraint to *roC. + (*pushxf): Limit oF constraint to 32bit targets and add oC + constraint for 64bit targets. + (pushxf splitter): Use PUSH_ROUNDING to calculate stack adjustment. + (*pushdf): Change rmF constraint to rmC. + 2017-03-03 Martin Liska * tree-ssa-loop-prefetch.c (pass_loop_prefetch::execute): diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 49ea9c04c5f..6ed23907032 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2992,7 +2992,7 @@ (define_insn "*pushtf" [(set (match_operand:TF 0 "push_operand" "=<,<") - (match_operand:TF 1 "general_no_elim_operand" "v,*roF"))] + (match_operand:TF 1 "general_no_elim_operand" "v,*roC"))] "TARGET_64BIT || TARGET_SSE" { /* This insn should be already split before reg-stack. */ @@ -3046,17 +3046,18 @@ (symbol_ref "true")))]) (define_insn "*pushxf" - [(set (match_operand:XF 0 "push_operand" "=<,<,<,<") - (match_operand:XF 1 "general_no_elim_operand" "f,r,*r,oF"))] + [(set (match_operand:XF 0 "push_operand" "=<,<,<,<,<") + (match_operand:XF 1 "general_no_elim_operand" "f,r,*r,oF,oC"))] "" { /* This insn should be already split before reg-stack. */ gcc_unreachable (); } - [(set_attr "type" "multi") - (set_attr "unit" "i387,*,*,*") + [(set_attr "isa" "*,*,*,nox64,x64") + (set_attr "type" "multi") + (set_attr "unit" "i387,*,*,*,*") (set (attr "mode") - (cond [(eq_attr "alternative" "1,2,3") + (cond [(eq_attr "alternative" "1,2,3,4") (if_then_else (match_test "TARGET_64BIT") (const_string "DI") (const_string "SI")) @@ -3075,14 +3076,14 @@ [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2))) (set (match_dup 0) (match_dup 1))] { - operands[2] = GEN_INT (-GET_MODE_SIZE (XFmode)); + operands[2] = GEN_INT (-PUSH_ROUNDING (GET_MODE_SIZE (XFmode))); /* Preserve memory attributes. */ operands[0] = replace_equiv_address (operands[0], stack_pointer_rtx); }) (define_insn "*pushdf" [(set (match_operand:DF 0 "push_operand" "=<,<,<,<,<,<") - (match_operand:DF 1 "general_no_elim_operand" "f,r,*r,oF,rmF,x"))] + (match_operand:DF 1 "general_no_elim_operand" "f,r,*r,oF,rmC,x"))] "" { /* This insn should be already split before reg-stack. */ -- 2.30.2