From c95b9d6d768327224c1cff313620ee10ed8f9da7 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Thu, 12 Dec 2013 23:17:16 +0100 Subject: [PATCH] gensoc: use add_verilog_include_path --- misoclib/gensoc/__init__.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/misoclib/gensoc/__init__.py b/misoclib/gensoc/__init__.py index 436cd4fd..615091a0 100644 --- a/misoclib/gensoc/__init__.py +++ b/misoclib/gensoc/__init__.py @@ -66,7 +66,7 @@ class GenSoC(Module): "lm32_shifter.v", "lm32_multiplier.v", "lm32_mc_arithmetic.v", "lm32_interrupt.v", "lm32_ram.v", "lm32_dp_ram.v", "lm32_icache.v", "lm32_dcache.v", "lm32_debug.v", "lm32_itlb.v", "lm32_dtlb.v") - platform.add_sources(os.path.join("verilog", "lm32"), "lm32_config.v") + platform.add_verilog_include_path(os.path.join("verilog", "lm32")) def register_rom(self, rom_wb_if, bios_size=0x8000): if self._rom_registered: -- 2.30.2