From c98c7d75ce929a40ce9be800e00b8077bd431492 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 3 Mar 2020 19:25:52 +0000 Subject: [PATCH] move default values to power_enums.py --- src/decoder/power_decoder.py | 7 ++----- src/decoder/power_enums.py | 5 +++++ 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/src/decoder/power_decoder.py b/src/decoder/power_decoder.py index 39c7976d..d6b02600 100644 --- a/src/decoder/power_decoder.py +++ b/src/decoder/power_decoder.py @@ -1,7 +1,7 @@ from nmigen import Module, Elaboratable, Signal from power_enums import (Function, InternalOp, In1Sel, In2Sel, In3Sel, OutSel, RC, LdstLen, CryIn, get_csv, single_bit_flags, - get_signal_name) + get_signal_name, default_values) class PowerOp: @@ -24,10 +24,7 @@ class PowerOp: def _eq(self, row=None): if row is None: - row = {'unit': "NONE", 'internal op': "OP_ILLEGAL", - 'in1': "RA", 'in2': 'NONE', 'in3': 'NONE', 'out': 'NONE', - 'ldst len': 'NONE', - 'rc' : 'NONE', 'cry in' : 'ZERO'} + row = default_values res = [self.function_unit.eq(Function[row['unit']]), self.internal_op.eq(InternalOp[row['internal op']]), self.in1_sel.eq(In1Sel[row['in1']]), diff --git a/src/decoder/power_enums.py b/src/decoder/power_enums.py index 38ef0325..b92c6224 100644 --- a/src/decoder/power_enums.py +++ b/src/decoder/power_enums.py @@ -22,6 +22,11 @@ single_bit_flags = ['CR in', 'CR out', 'inv A', 'inv out', 'cry out', 'BR', 'sgn ext', 'upd', 'rsrv', '32b', 'sgn', 'lk', 'sgl pipe'] +# default values for fields in the table +default_values = {'unit': "NONE", 'internal op': "OP_ILLEGAL", + 'in1': "RA", 'in2': 'NONE', 'in3': 'NONE', 'out': 'NONE', + 'ldst len': 'NONE', + 'rc' : 'NONE', 'cry in' : 'ZERO'} def get_signal_name(name): return name.lower().replace(' ', '_') -- 2.30.2