From c9b004af58fd7448c9522eae14b7686152b98487 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 15 Oct 2016 14:17:56 +0200 Subject: [PATCH] radeonsi/gfx9: handle GFX9 in a few places MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/cik_sdma.c | 4 ++-- src/gallium/drivers/radeonsi/si_perfcounter.c | 1 + src/gallium/drivers/radeonsi/si_pipe.c | 1 + src/gallium/drivers/radeonsi/si_state_shaders.c | 1 + 4 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/cik_sdma.c index bee35cd8212..fdcf22f6d49 100644 --- a/src/gallium/drivers/radeonsi/cik_sdma.c +++ b/src/gallium/drivers/radeonsi/cik_sdma.c @@ -429,9 +429,9 @@ static bool cik_sdma_copy_texture(struct si_context *sctx, dsty % 8 == 0 && srcx % 8 == 0 && srcy % 8 == 0 && - /* this can either be equal, or display->rotated (VI only) */ + /* this can either be equal, or display->rotated (VI+ only) */ (src_micro_mode == dst_micro_mode || - (sctx->b.chip_class == VI && + (sctx->b.chip_class >= VI && src_micro_mode == V_009910_ADDR_SURF_DISPLAY_MICRO_TILING && dst_micro_mode == V_009910_ADDR_SURF_ROTATED_MICRO_TILING))) { assert(src_pitch % 8 == 0); diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index 00db2c45bad..41dd52edb11 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -672,6 +672,7 @@ void si_init_perfcounters(struct si_screen *screen) num_blocks = ARRAY_SIZE(groups_VI); break; case SI: + case GFX9: default: return; /* not implemented */ } diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index c66203e0add..7f0b4453088 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -731,6 +731,7 @@ static bool si_init_gs_info(struct si_screen *sscreen) case CHIP_POLARIS10: case CHIP_POLARIS11: case CHIP_POLARIS12: + case CHIP_VEGA10: sscreen->gs_table_depth = 32; return true; default: diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index e1286b89333..faafa329ef4 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -2391,6 +2391,7 @@ static void si_init_tess_factor_ring(struct si_context *sctx) max_offchip_buffers = MIN2(max_offchip_buffers, 126); break; case CIK: + case GFX9: max_offchip_buffers = MIN2(max_offchip_buffers, 508); break; case VI: -- 2.30.2