From ca78a47b056b5a4589933492db364f6e418abb0f Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 26 Feb 2012 14:05:35 +0100 Subject: [PATCH] r600g: make some scissor regs invariant on r600-r700 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Alex Deucher Reviewed-by: Christian König --- src/gallium/drivers/r600/r600_hw_context.c | 4 ---- src/gallium/drivers/r600/r600_state.c | 20 ++++++++------------ 2 files changed, 8 insertions(+), 16 deletions(-) diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index 9e99c7ee54f..6d30aa3ca05 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -374,12 +374,8 @@ static const struct r600_reg r600_context_reg_list[] = { {R_028010_DB_DEPTH_INFO, REG_FLAG_NEED_BO, 0}, {R_028D24_DB_HTILE_SURFACE, 0, 0}, {R_028D34_DB_PREFETCH_LIMIT, 0, 0}, - {R_028030_PA_SC_SCREEN_SCISSOR_TL, 0, 0}, - {R_028034_PA_SC_SCREEN_SCISSOR_BR, 0, 0}, {R_028204_PA_SC_WINDOW_SCISSOR_TL, 0, 0}, {R_028208_PA_SC_WINDOW_SCISSOR_BR, 0, 0}, - {R_028240_PA_SC_GENERIC_SCISSOR_TL, 0, 0}, - {R_028244_PA_SC_GENERIC_SCISSOR_BR, 0, 0}, {R_028250_PA_SC_VPORT_SCISSOR_0_TL, 0, 0}, {R_028254_PA_SC_VPORT_SCISSOR_0_BR, 0, 0}, {R_02843C_PA_CL_VPORT_XSCALE_0, 0, 0}, diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 163469c0c64..38b48a29b7d 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1604,24 +1604,12 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, tl = S_028240_TL_X(0) | S_028240_TL_Y(0) | S_028240_WINDOW_OFFSET_DISABLE(1); br = S_028244_BR_X(state->width) | S_028244_BR_Y(state->height); - r600_pipe_state_add_reg(rstate, - R_028030_PA_SC_SCREEN_SCISSOR_TL, tl, - NULL, 0); - r600_pipe_state_add_reg(rstate, - R_028034_PA_SC_SCREEN_SCISSOR_BR, br, - NULL, 0); r600_pipe_state_add_reg(rstate, R_028204_PA_SC_WINDOW_SCISSOR_TL, tl, NULL, 0); r600_pipe_state_add_reg(rstate, R_028208_PA_SC_WINDOW_SCISSOR_BR, br, NULL, 0); - r600_pipe_state_add_reg(rstate, - R_028240_PA_SC_GENERIC_SCISSOR_TL, tl, - NULL, 0); - r600_pipe_state_add_reg(rstate, - R_028244_PA_SC_GENERIC_SCISSOR_BR, br, - NULL, 0); r600_pipe_state_add_reg(rstate, R_0287A0_CB_SHADER_CONTROL, shader_control, NULL, 0); @@ -2068,6 +2056,14 @@ void r600_init_atom_start_cs(struct r600_context *rctx) r600_store_context_reg(cb, R_028C48_PA_SC_AA_MASK, 0xFFFFFFFF); + r600_store_context_reg_seq(cb, R_028030_PA_SC_SCREEN_SCISSOR_TL, 2); + r600_store_value(cb, 0); /* R_028030_PA_SC_SCREEN_SCISSOR_TL */ + r600_store_value(cb, S_028034_BR_X(8192) | S_028034_BR_Y(8192)); /* R_028034_PA_SC_SCREEN_SCISSOR_BR */ + + r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2); + r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */ + r600_store_value(cb, S_028244_BR_X(8192) | S_028244_BR_Y(8192)); /* R_028244_PA_SC_GENERIC_SCISSOR_BR */ + r600_store_context_reg_seq(cb, R_0288CC_SQ_PGM_CF_OFFSET_PS, 2); r600_store_value(cb, 0); /* R_0288CC_SQ_PGM_CF_OFFSET_PS */ r600_store_value(cb, 0); /* R_0288D0_SQ_PGM_CF_OFFSET_VS */ -- 2.30.2