From cab428c16335c6adac574fd7fce729ee354342dd Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 16 Apr 2022 18:29:07 +0100 Subject: [PATCH] --- HDL_workflow/ls2.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/HDL_workflow/ls2.mdwn b/HDL_workflow/ls2.mdwn index 68e61ccf0..ec647175a 100644 --- a/HDL_workflow/ls2.mdwn +++ b/HDL_workflow/ls2.mdwn @@ -56,3 +56,19 @@ If needed modify sources to produce a fixed file bitstream and minicom -D /dev/ttyUSB1 xc3sprog -c nexys4 top.bit +# Using ls2 with microwatt + +This is doable but tricky. An older version is required at present. + + git clone https://git.libre-soc.org/git/microwatt.git + git checkout microwatt_verilator + make microwatt.v + +From there, some hand-editing is required. search for core_NNNNNNN_XXX_YYY +and rename it to external_core_top. Save the file as external_core_top.v +and it can be used in place of the Libre-SOC Core, above. + +In fact any core can be used with ls, as long as it is compliant with +the interfaces. Both Wishbone Interfaces must be WB4 Pipeline +compliant (proper stall handling) or the stall signal faked externally +with a wrapper: `stall=stb&~ack` -- 2.30.2